Question

Create a circuit using Logisim that implements a memory register capable of storing a 4 bit binary number. You should investigate the different circuits that can be used to store a bit of memory and then utilize the one that meets the following requirements.

Your register circuit must be able to support the inputs detailed in the following diagram:

Data In--D Q. Data Out Control Basic Memory Device

Each bit of the register circuit must support a data in, a data out, and a control. The control functions such that the data value will only be changed when the control bit is toggled on.

The value in the register must be persistent and can only be changed when the control bit has been toggled.

You should develop and test the 4 bit register using Logisim.

When you have successfully developed a functioning 4 bit register, you should duplicate the circuit and add it to the two inputs of the ALU circuit below. Add a third register to the output of the ALU as well.

0 0
Add a comment Improve this question Transcribed image text
Know the answer?
Add Answer to:
Create a circuit using Logisim that implements a memory register capable of storing a 4 bit...
Your Answer:

Post as a guest

Your Name:

What's your source?

Earn Coins

Coins can be redeemed for fabulous gifts.

Not the answer you're looking for? Ask your own homework help question. Our experts will answer your question WITHIN MINUTES for Free.
Similar Homework Help Questions
  • M1 M3 32-bit pgm. ctr. 32-bit adder register unit 4 data in data memory instr. decoder ALU instru...

    M1 M3 32-bit pgm. ctr. 32-bit adder register unit 4 data in data memory instr. decoder ALU instruction memory addr. in M2 addr. in data out dst r data out data in offset operation 2. Can the system in the above figure handle multiplication? Why or why not? M1 M3 32-bit pgm. ctr. 32-bit adder register unit 4 data in data memory instr. decoder ALU instruction memory addr. in M2 addr. in data out dst r data out data in...

  • Using logisim to create a 4bit controlled comparator ECFICATIONS NPUTS Create a cireuit in Logisi...

    Using logisim to create a 4bit controlled comparator ECFICATIONS NPUTS Create a cireuit in Logisim thait will take the following inputs 4 bit binary number :4 bit binary number Control where C-O, A and B will be treated as unsigned binary C-1,A and B will be treated as 2's complement signed binary (for example, the number 301 represents the value 5' it is treated as unsigned binary but it represents the value - if it is treated as 2's complemene...

  • Design a 4-bit register using four J-K flip-flops (D4, D3, D2, and D1) with the following...

    Design a 4-bit register using four J-K flip-flops (D4, D3, D2, and D1) with the following behaviour. There are two control inputs, M (mode) and L (load). When L and M are both high, data is loaded in parallel from the data inputs A4, A3, A2, and A1. When M is high and L is low, there is a circular left shift of the data in the register. If you can explain the work, that would be great. Really struggling...

  • In quartus prime Implement a 4-bit adder/subtractor using structural VHDL. The circuit will have two 4-bit...

    In quartus prime Implement a 4-bit adder/subtractor using structural VHDL. The circuit will have two 4-bit data inputs (A and B), a control line (add /sub), a 4-bit sum output (S), a carry-out bit (Cout), and an overflow flag. You need two VHDL files (fulladd.vhd) and (hybrid.vhd) to implement the design. VHDL code, fulladd.vhd, will implement a single-bit full adder. The VHDL file, hybrid.vhd, will create four instances of the single-bit full adder. Four XOR gates will be needed to...

  • 4 BIT ALU due 4/24 Midnight Implement a 4 bit ALU as covered in class. INPUTS:...

    4 BIT ALU due 4/24 Midnight Implement a 4 bit ALU as covered in class. INPUTS: A – 4 bit 2’s complement number B – 4 bit 2’s complement number Control – determines ALU functionality OUTPUT: If control = 00, then output = A AND B If control = 01, then output = A OR B If control = 10, then output = A ADD B If control = 11, then output = A SUBTRACT B REQUIREMENTS: 1) You are...

  • Design an 8-function ALU that accepts 4-bit inputs a and b, a 3-bit input signal select,...

    Design an 8-function ALU that accepts 4-bit inputs a and b, a 3-bit input signal select, and produces a 5-bit output out. The ALU implements the following functions based on 3-bit input signal select. - - - - - - - select signal function 3’b000 out = a 3’b001 out = a+b 3’b010 out = a-b 3’b011 out = a/b 3’b100 out = a%b (remainder) 3’b101 out = a << 1 3’b110 out = (a>b) (magnitude comparison) 3’b111 out =...

  • Objective: Creating a register file (memory) using Verilog. The register file is made up of four registers and each...

    Objective: Creating a register file (memory) using Verilog. The register file is made up of four registers and each register holds one nibble (half a byte, i.e., four bits) 3. Create a D flip-flop AD flip-flop holds 1 bit of data, and it only changes its data when the clock changes. We want a positive edge triggered flip-flop. Design your Verilog D flip-flop, so we will create them now. Enter the 2 to 4 line decoder. We will need two...

  • Modify the circuit to support a MFCC instruction. MFCC Rd instruction: Move From Condition Codes MFCC copies into the fo...

    Modify the circuit to support a MFCC instruction. MFCC Rd instruction: Move From Condition Codes MFCC copies into the four rightmost bits of Rd the values of the ALU signals Carry (C), Overflow (O), Zero (Z) and Negative (N) as they were set by the previous R- type instruction. The remaining 28 bits of Rd are set to zero. Describe the changes and additions needed for the single-cycle MIPS processor datapath and control to support this instruction. Hints: 1) MFCC...

  • First you must create a logic circuit using only basic gates such as AND, OR, NOR,...

    First you must create a logic circuit using only basic gates such as AND, OR, NOR, NAND, NOT, etc. to implement an ADDER capable of adding two 4 bit binary numbers. Second you must create a logic circuit using only basic gates such as AND, OR, NOR, NAND, NOT, etc. to implement a Subtractor that is capable of subtracting the second number from the first, by converting the second number into its 2's complement form and then adding the resulting...

  • Modefi the following circuit by adding one more Data Memory. instrucion[25-0.(left Shift Jump address (31-0 26...

    Modefi the following circuit by adding one more Data Memory. instrucion[25-0.(left Shift Jump address (31-0 26 28 | PC + 4 [31-28] PC Src | M Mux 1u Add Branch Adder Add result XPC Src Mux 2 RegDste Shift left 2/ PC Mux 1 Select PC Adder Jum Branch AND Gate Instruction (31-26 Control ALUOP MemWrite AL RegWrite Instruction (25-21]Read ALU Src2 Mux register 1 Read Instruction 120-16)Readdata 1 PC Read address Instruction InstructionInstruction (15-11register 0-1 register 2 Zero LU...

ADVERTISEMENT
Free Homework Help App
Download From Google Play
Scan Your Homework
to Get Instant Free Answers
Need Online Homework Help?
Ask a Question
Get Answers For Free
Most questions answered within 3 hours.
ADVERTISEMENT
ADVERTISEMENT