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A 1 KB cache in a system with 32-bit addresses using byte addressing is organized using four 4-byte words per line and direct mapping.
(a) How many sets are in the cache?
(b) How many bits are in the tag and index?
(c) Repeat (a) and (b) if the cache is four-way set associative.
(d) Repeat (a) and (b) if the cache has two 4-byte words per line.
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