This question investigates cache use in different types of cache. Consider a system of 8Kbytes of byte-addressable main memory partitioned into blocks of 32bytes each. The system has cache of size 512bytes. The main memory blocks are being accessed in the order shown in the tables (the numbers are in decimal). Assuming the cache is empty at the start.
Scenario 1: The system uses directly mapped cache.
How is the memory address to be interpreted?
|
Address field |
Value |
Reason |
|
Word field length: |
||
|
Block field length: |
||
|
Tag field length: |
Show whether each memory block access is a hit or a miss. Then compute the hit ratio.
|
Memory block |
Address Tag field |
Address Block field |
Address Word field |
Maps to cache block |
Hit/Miss |
|
1 |
|||||
|
5 |
|||||
|
21 |
|||||
|
7 |
|||||
|
5 |
|||||
|
1 |
|||||
|
17 |
|||||
|
7 |
|||||
|
17 |
|||||
|
5 |
|||||
|
Total |
|||||
|
Address field |
Value |
Reason |
|
Word field length: |
5bits |
Each block contains 32bytes, and we need Log(32)bit address to access. |
|
Tag field length: |
8bits |
Memory size is 8kB, so width of address is 13bit. So tag = 13 - 5 |
|
Memory block |
Address Tag field |
Address Word field |
Maps to cache block |
Hit/Miss |
|
1 |
00000001 |
00000 |
1 |
Miss |
|
5 |
00000101 |
00000 |
2 |
Miss |
|
21 |
00010100 |
00000 |
3 |
Miss |
|
7 |
00000111 |
00000 |
4 |
Miss |
|
5 |
00000101 |
00000 |
2 |
Hit |
|
1 |
00000001 |
00000 |
1 |
Hit |
|
17 |
00010001 |
00000 |
5 |
Miss |
|
7 |
00000111 |
00000 |
4 |
Hit |
|
17 |
00010001 |
00000 |
5 |
Hit |
|
5 |
00000101 |
00000 |
2 |
Hit |
|
Total |
5/5 |
|||
Therefore hit ratio is 0.5
NOTE that all Address Word field are marked zero, since only block information is given. We do not have information on which word is being accessed.
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