Question

4. The following diagram show the Xeon processor pipeline. What do you think is the function of each of the following blocks a. 2x ALU Simple Instr b. Slow ALU Complex Instr C. FP MMX SSE d. FP Move 90nm Technology, Intel Technology Journal, Vol 8, Issue 1, Feb. 2004.)" Front-End BTEB 4K Entries Instruction TLB/ Prefetcher Instruction Decoder Execution Trace Cache (12K μ0ps) Systen Bus Microcode ROM Trace Cache BTB 2K Entries Bus Interface Unit μ0p Queue Allocator / Register Renamer Quad Pumped 6.4 GB/s Memory uop Queue IntegeriFloating Point uop Queue Memory Scheduler Fast SlowlGeneral FP Scheduler Simple FP L2 Cache (1M Byte Integer Register File/Bypass Network FP Register/Bypass 8-way) AGU AGU MMX SSE SSE2 SSES FP Move Load S tore Simple Simple Complea Address Addres Instr. Instr Instr 108GB/s L1 Data Cache (16Kbyte 8-way) 5. What is the smallest and the largest number that can be represented with 32 bit in the following representations? a. Unsigned integer b. Signed twos complement integer c. Floating point

Answer 1