Question

RAM chip : 512K × 16 RAM chip

The RAM chip uses coincident decoding by splitting the internal decoder into row select and column select. Assuming that the RAM cells are arranged that number of rows is twice the number of columns.

a) State the size of the row decoder used

b) State the size of the column decoder used

c)The value A formed should be (057)10. Determine the row and column selection lines that are enabled when the input address is the binary equivalent of the address A

Answer 1

1). ANSWER :

GIVENTHAT :

Total number of bits in memory = 29 * 210 * 24 = 223 bits.

As the question states that the number of rows = 2*number of columns,

Let us assume that the number of columns = x
Therefore, the number of rows becomes = 2*x
and ATQ
2x*x = 223
x2 = 222
x = 211
a)
number of rows = 2*x = 212.
The number of bits required for rows = 12
b)
Number of columns = 211
The number of bits requires for columns = 11

c) The address in binary: 1011001001110
For rows: first 12 bits: 101100100111 = 0x2855 is the row decoder output that is enabled.

For column:
The 16 lines enabled for columns are:
0000 0 = 0x0
0001 0 = 0x2
0010 0 = 0x4
0011 0 = 0x6
0100 0 = 0x8
0101 0 = 0xa
0110 0 = 0xc
0111 0 = 0xe
1000 0 = 0x10
1001 0 = 0x12
1010 0 = 0x14
1011 0 = 0x16
1100 0 = 0x24
1101 0 = 0x1a
1110 0 = 0x1c
1111 0 = 0x1e