Question

Compute the correct CPU computations and actions.

Write the final updated values for each memory, register and flags after the given instruction executes in the space provided. There are multiple parts of this problem.

Endianness: Check for endianness in case of loads and stores, in each part of the question. If the question does not specify the endianness, you can assume little-endian.

MOVT R3, #OxBD34 Orig. Updated Data Updated Data R6 Memory Address Ox84F0 0x84F1 0x8452 Ox84F3 Ox8454 Ox84F5 Ox84F6 0x8457 Ox84F8 Ox8459 0x84FA Ox84FB Ox84FC Ox84FD Ox84FE Ox84FF Ox8500 Ox8501 0x8502 0x8503 0x8504 Ox8505 0x8506 Ox8507 0x8508 Ox8509 0x850A 0x850B Ox850C 0x850D Ox850E 0x850F Orig. Data Ox82 0x32 OxBC OxA4 OxF4 Ox6A Ox9D Oxc2 0x42 Ox67 Ox8D OxA1 OxF2 OxB8 Ox5E OXEE 0xFA OXF3 Ox54 OxBA Ox6D Ox9C Ox78 OxBB OxC3 OxB4 OxAA OxD9 OxDA OXFF OxE5 Ox33 Register Data RO OxDC002B45 R1 Ox00008500 R2 OxAB03873C R3 Ox2B78DFEO R4 Ox000084F0 R5 Ox00100000 Ox041BOCOD R7 Ox00100000 R8 Ox00000000 R9 Ox00842 ABO R10 Ox0ABD9830 R11 Ox0000000A R12 Ox00000002 R13 OX00008500 R14 Ox003762 DD R15 Ox00100000 Flags N Z с V Q 0 1 1 0 0

Answer 1

A)

LDRSB R10,[R4,#0x18]! uses pre-indexed immediate addressing mode.

1. This instruction evaluate R4+0x18 first and update R4 since it is pre-indexed instruction. It increments the index prior to the use.

R4=R4+0x18=0x000084F0+0x18

=0x00008508

2. Read the lower byte of data from the memory address 0x00008508 ie C3

3. Load into register R10 with sign extended form. ie MSB(31-8) will be filled with 1. ie 0xFFFFFFC3

(C3 is 1100 0011 with sign bit 1 as highlighted and this will be extended till the 31st position ie

1111 1111 1111 1111 1111 1111 1110 0011=FFFFFFC3)

4. Flag N=1 since the sign of the number is 1

Register R4 and R10 and Flag N are modifiied here and all other memory and register contents remains the same.