Question

8. (2 Points) Given the following RAM integrated circuit: U1 I/00 I/01 I/O2 I/03 I/04 I/O HULLUITA 199 00 JON I/O 1/07 Jon A10 -WE OE CS a) What is the organization? b) What is the capacity?

Answer 1

Given that : ब्बालापानलग-AT- A memory unit stores binary information .8 bits [a byte), a byter, a bytes Block diagram in groups of birs (woody) p dala Memory is an impostant component of microcontroll efc or CPUs for Storing information that is aused to control electronics Projects. internally, memory has been divided into several parts that consists of special types of fegistess those belp to store data. These are two types of memories such as RAM memory and rom memory in many two are avaliable in similca way. Here we copy, discuss abou RAM memory Ofganization of 8051 and its register. This in for marion is helpful for the embedded system designers to Logite program easily. RAM memory Organization : A group of storage to courons in RAM memory is called Ragny memory organization which can be controlled by psco register value. 8051 microcontrolled RAM memory integrally divided into a set or storage locations such as banks ibit - addr cuable area and scratcn- pod area.

ca 3 it cald yessable Area LOH 1 FH B3 Stack pointes 23 3FH scraren pand B2 OOH RAM memory Organization BANKS!- The banks contain veevious general puspare registeas such as RO-R7, and all such registers are byte - addressable registers that store or remove only a byte of data. The banks are divided into four different banks such as: Banko Bank 1 Bank2 Bank 3 fach bank consists &- general Puspose registers and has own Addrey to cut egoside stored information. These can be selected by using the values of Psw Segistes ciie. RSA, Rso). The bank 1, banke, Lonk3, can be used al sta cc poinses aseg. co beneven Stacr memory Organidanion is fun i then the data stores in scratch pod area Default Address Of Stacic pointes is Othe Bo BIB2 B3 oth of ith 87878786 86 86 85 75 75 rq 84 84 83 13 83 Үg 7, 12 71 72 Фото Го осh Oғh oh 28, Bit Medressable Area: Bit addressable area consists of bit - addressable regůreas that Store or gemore only a bit of data. This area has total 128 addresses staring from ooh to 07th which sepresents for dara Storage lo camion. Bit adhéressable area is formed close to yose agistes banks.

They are designed from addresable area is tol med close register banks . They are designed to the (3) from addrey doh to LFH. Bit Addressable oqea maunly used to store bit vobiable from on applican program, like device olovput starus such as CEPs or moror's cow and Ort etc . As need only bit addressable area to store this status, if we consides bite addressable area for storing this status as some a memory will be wasted Cache memory is a type of memory which is used to hold the ! trauerty wised data from main memory lo Cosens . me cache memory is placed close to the cpu. Coche memory stars from con to oth. cache memory is Selahvery small . consisted coith fk and lok but it looks efectively, it is a byte Add reisable memory and it stores and remove only a bit or doda The Coche memory filled from the main the memory the cpu cepat ereauised instructions. The Gache memory mainly weed for seduce the aresare time to the acces memory. 3 TH scratch pad arca 30H 2FH bit addressable area @он 1 FH B) Sace poflues Bь В, во он b) The channel Capacity is 29.1.= 2048 bytes why because address line = 11