Question

a. Consider a 2048-row NOR decoder. To how many address bits does this correspond? How many output lines does the decoder have? How many input lines does the NOR array require? How many NMOS and PMOS transistors does such a design need? of the tree column address bits are involved? How many levels of pass gates are used? How many pass transistors are there in total?

Answer 1

a) 2048 bits = 2^11 SO 11 address lines are corresponds.

11 input lines fed to decoder having 2048 ouput lines.

11 input NOR array is require. [Is is euqal to number of input lines]

Pass transistor colum based decoder requires no of transistor = (K+1)*2^K(Decoder)+2*2^K (Pass Transistor)

where K = No of address lines

= 12*2¹¹+2*2¹¹=24576+4096=28672

NMOS transistor = 28672 - 11=28661

PMOS Trasistor = 11(No of address line)

2. 1 Mbit array require 20 address line(2²⁰ = 1 Mbit) Here k=10(Coloum Decoder)

In tree based structure no of transistor are reduced = 2*2*2^(K) -1=4095

1 Level Pass gates are used

No of pass transistor in total = 76 Trasistor