Question

# I. Write VHDL statement to perform the following operation using simple arithmetic and logic circuits: Y...

I. Write VHDL statement to perform the following operation using simple arithmetic and logic circuits:

Y = (3X*(8X + 6))/2 mod 28,

where X and Y are 16-bit unsigned numbers. Minimize the number of multipliers and dividers used in your circuit. You can ignore overflow. (8 points)

`library ieee;`
```use ieee.std_logic_1164.all;
```
```entity examp is
Port ( X : in  STD_LOGIC_VECTOR (15 downto 0);    -- 16-bit number
Y : out  STD_LOGIC_VECTOR (15 downto 0));    -- 16-bit result

end examp;

architecture Behavioural of examp is
```
```    signal X : STD_LOGIC_VECTOR (15 downto 0);
signal Y : STD_LOGIC_VECTOR (15 downto 0);```
```begin
Y<= (3 * X *(8 * X + 6)) / 2 mod 28;
end Behavioural;```

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