Question

I. Write VHDL statement to perform the following operation using simple arithmetic and logic circuits: Y...

I. Write VHDL statement to perform the following operation using simple arithmetic and logic circuits:

Y = (3X*(8X + 6))/2 mod 28,

where X and Y are 16-bit unsigned numbers. Minimize the number of multipliers and dividers used in your circuit. You can ignore overflow. (8 points)

0 0
Add a comment Improve this question
Answer #1
library ieee;
use ieee.std_logic_1164.all;
entity examp is
    Port ( X : in  STD_LOGIC_VECTOR (15 downto 0);    -- 16-bit number
           Y : out  STD_LOGIC_VECTOR (15 downto 0));    -- 16-bit result
           
end examp;  

architecture Behavioural of examp is
    signal X : STD_LOGIC_VECTOR (15 downto 0);
    signal Y : STD_LOGIC_VECTOR (15 downto 0);
begin
   Y<= (3 * X *(8 * X + 6)) / 2 mod 28;
end Behavioural;
Add a comment
Know the answer?
Add Answer to:
I. Write VHDL statement to perform the following operation using simple arithmetic and logic circuits: Y...
Your Answer:

Post as a guest

Your Name:

What's your source?

Earn Coins

Coins can be redeemed for fabulous gifts.

Not the answer you're looking for? Ask your own homework help question. Our experts will answer your question WITHIN MINUTES for Free.
Similar Homework Help Questions
ADVERTISEMENT
Free Homework Help App
Download From Google Play
Scan Your Homework
to Get Instant Free Answers
Need Online Homework Help?
Ask a Question
Get Answers For Free
Most questions answered within 3 hours.
ADVERTISEMENT
Active Questions
ADVERTISEMENT