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We have the following sequence of instructions in assembly language. lw r4, 4($s1) or r1,r2,r3 or...

We have the following sequence of instructions in assembly language.

lw r4, 4($s1)
or r1,r2,r3
or r2,r1,r4
or r1,r1,r2

  1. Using your knowledge of piplining and the five stages (IF, ID, EXE, MEM, WB)

  2. Assume there is forwarding in this pipelined processor and each stage will take 200ns.

    Draw the pipeline chart and calculate how many cycles are consumed

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Answer #1

We are using a traditional 5 stage MIPS pipeline with 5 stages with data forwarding

In forwarding if a result of some instruction is available and is needed somewhere in the future instructions but the result has not been written to the memory, instead of waiting for the result to be written to the memory and stalling the pipeline, we forward the result to the place where is needed.

In the pipeline chart I have used arrows to represent data forwarding.

Given the following sequence of instructions :

I1 : lw r4, 4($s1)
I2 : or r1,r2,r3
I3 : or r2,r1,r4
I4 : or r1,r1,r2

In lw (Load Word) instruction, result is available after the MEM stage and can be forwarded.

In ALU instructions like or instruction, result is available after the EX stage and can be forwarded

The total number of clock cycles consumed is 8

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