Question

Consider the following MIPS code segment that is executed on a 5-stage pipeline architecture that does not implement forwarding or stalling in hardware.

   (1) add $4, $1, $1
                              (2) add $7, $4, $9
                              (3) lw $2, 40($8)
                              (4) sub $8, $1, $2
                              (5) sw $8, 80($2)
                              (6) sub $2, $8, $4
                              (7) lw $8, 2($1)
                              (8) add $8, $4, $2

1. Identify the data dependences that cause hazards. You are to use the following format to inform each dependency reported:

                instruction (y) depends on instruction (z) caused by register $

2. If the hazards identified in (a.) are to be prevented by the compiler through no-op insertions but without reordering the instructions, indicate where would the compiler add no-ops. You are to use the following format to inform each dependency reported:

insert x no-ops between instructions (y) and (z).

c. Repeat parts (a) and (b) assuming that the architecture has hardware to implement forwarding and stalling.

Answer 1

Answer is as follows :

a) Data hazards are as follows :

• Instruction 2 depends on instruction 1 caused by register $4 with RAW hazard.
• Instruction 4 depends on instruction 3 caused by register $2 with RAW hazard.
• Instruction 4 depends on instruction 3 caused by register $8 with WAR hazard.
• Instruction 5 depends on instruction 4 caused by register $2 with WAR hazard.
• Instruction 5 depends on instruction 4 caused by register $8 with RAW hazard.
• Instruction 6 depends on instruction 5 caused by register $2 with WAR hazard.
• Instruction 7 depends on instruction 6 caused by register $8 with WAR hazard.
• Instruction 8 depends on instruction 7 caused by register $8 with WAW hazard.

b) Insertion of NOP's based on data hazards.

So these are :

• insert 1 no-ops between instructions 1 and 2
• insert 2 no-ops between instructions 3 and 4
• insert 2 no-ops between instructions 4 and 5
• insert 1 no-ops between instructions 5 and 6
• insert 1 no-ops between instructions 6 and 7
• insert 1 no-ops between instructions 7 and 8

So total of 8 no-ops are added.

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