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Using the concepts of 8086 Answer the following questions in 2 or 3 lines: 1) What...

Using the concepts of 8086

Answer the following questions in 2 or 3 lines:

1) What are the contents of CS and IP registers immediately after the reset of the 8086?
2) WhatistheminimumtimeforwhichtheResetinputmustbeactivatedforproperresetof
the 8086?
3) What is the maximum frequency and duty cycle of the clock signal given to the 8086?
4) Which pin of the 8086 is used to synchronize the slowly operating peripherals with the
8086?
5) What is the role of status line S4 and S3 in the 8086?
6) Which pin of the 8086 shows the status of Interrupt Flag (IF) bit?
7) What is the role of ALE pin in the 8086?
8) Which conditions force the 8086 to come out of Halt state?
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9) What is the relation between WAIT instruction and ???? pin?
10) What is the role of QS1 and QS0 pins of the 8086?
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Answer #1

1)CS(Code Segment):Code segment is a 16-bit register contains address of 64KB segment.

                                     Code Segment is set to FFFF after an 8086 resert.

    IP(Instruction Pointer):Instructions pointer is a 16-bit register. It holds the address of the next instruction to be executed.

                                         Instruction pointer is set to 0 after an 8086 resert.

2) The minimum time is 10 ms for reset input must be active.

3)The maximum frequency and duty cycle of the clock signal frequency of 8086 is originally limited to 5MHz,but the last  version were specified to 10MHz.

4) Ready pin is used to synchronize the slowly operating peripherals with the 8086.Ready is the acknowledgement from the   addressed memory,This signal is active HIGH.

5)Role of status line S4 and S3 is: Bit S4 and S3  together from a 2 bit  binary code that identifies which of the internal segments of 8086 registers are used to generate the physical address,That was output on the address.

6) In 8086 totally 16 flag registers are there among those 9 are active

Interrupt enable Flag (IF) - when this flag is set to 1 CPU reacts to interrupts from external devices.

7)Address Latch Enable(ALE):In 8086 ALE is one of the microprocessor which has multiplexed address or data lines.For both address and data transfer we use the same 16 lines.

8)Request or Reset are will force the 8086 to come out of the Halt State. Even the HOLD  request cannot the request the force 8086 to  come out of the Halt State.

    Halt State:It's stops the instruction execution,and place the processor in a Halt State.

9)wait: Wait instruction executes while the pin configuration is 1 and nothing happens the next instructions executes normally.If pin configuration is 0 wait the instruction executes,until the microprocessor return 1.

Test: Test pin is a input pin it is only  used by the wait instruction.

10)These pins are available at pin 24 and 25,These are queue status signals generators.These signals provide the status of instruction queue.

conditions:Both are 0,0-->no operation

                                1,0 First byte of code from the ready queue

                                0,1 Empty the queue

                                1,1 Subsequent byte from the queue

with respective of qs1 and qs0.

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