Question

a. Given a CMOS inverter has gate width Wn-20μm, channel length Lp-La- 2μm, process parameter Kp = 2.0x10-5A/V2, Kn = 5.0x10-5A/V2, find the value of (5 marks) the gate width Wp for Bp n b. Given that the sheet resistance of the polysilicon is 4.0d the capacitance per unit area of the polysilicon is 0.1fF/um2. Calculate the time constant of a polysilicon polygon with structure shown in the figure, width equals to 3A and the (6 marks) corner resistance is taken as 0.65 square 23λ 142 19λ C. A uniform polysilicon line has length 1,500μm and width 4.0μm. Its sheet resistance is 30.0Ω , area capacitance is 0.08fFjum2, and perimeter capacitance is 0.046fF/um. Use Lumped RC model to calculate low-to-high (9 marks) propagation delay

Answer 1

CMos vesste haus iven Pamameten - Ln L-n L-p Kp Ln (B) To calculate Terme Consta nt c Polys?! ico Polyon Capacita n ce per unit area=0.1fF/ m오

Resistance) Rs (Sheet 4S2|Square. ヲ 3거 where Ex Capactance per uni area wohexe fox iCapaci tane 1S Crne+여 -0.1 x 10-15 x 0,65 x3 Cm etal = 0.195 x10 -Is -1 5 Ti me Constant , 't = 0.166 x 10-5 = 30 S2l square つ Aou 10 high Pro pagatto n delay, Lw

IS 618-36 X 10-12 fF CToted