Question

Problem 3: Design Problem On Figure P3a, you have a Common Source (CS) n-channel MOSFET amplifier. Notice the absence of a source resistor Rsig and load resistor R. If we know how the present amplifier (the one on Figure P3a) behaves without Rsig and RL, we can infer its behaviors if Rsig and R were to be added. design the amplifier circuit on Figure P3a, i.e., you have to find appropriate values for RGj You are to RG,, RD, and Rs, such that the voltage gain of the amplifier Vout 2 V/y Vsig Aside from that: MOSFET Q1 (2N7000 MOSFET as shown in Figure P3a) needs to be biased such that it is operating in the active region. By the way, for the 2N7000 MOSFET Q1, assume a threshold voltage V 2V and transconductance parameter k = 100 mA "/y2 12 V Use a value of the DC power supply Vpp that is no more than 12 V. That is, Vpp Make sure the Drain voltage Vp is halfway between VDD and Vss GROUND 0 Vv. That is, VDD Vss VDD 0V VDD VD 2 7 Make sure that resistors R, and RG are both at least higher than or equal to 10 kn. That is, both RG, 10 kN and RG, 2 10 k0. VDD RD RG1 Cc2 Vout Q1 Cc1 2N7000 Vsig RG2 RS Figure P3a ww Design Procedures: Step One: Pick a value for Vnn- Recall that, per design requirements, you need to have VD 12 V. You may be better off choosing the maximum allowable value for VDD, i.e., Vpo = 12 V Vnn Step Two: Yuu can then compute Vp 2 Step Three: Assuming active region operation for Q1, note that (1) VDD-VD RD In or (2) VDD-Vp In = Rp and, given I= Ip and (2), (3) Vs RD VDD-VD- Vs Vs Rs Is In Moreover, recall that, for a MOSFET, IG = 0 V and (4) 2klD gm Step Four: Derive the amplifier's voltage gain. You should be able to perform the small-signal analysis of the amplifier circuit on Figure P3a by hand (see class notes) and derive its voltage gain. It can be shown, using (3), that the CS amplifier circuit (in Figure P3a) yields a voltage gain (VDD-VD)gmRp VDD-VD +#mRp Vs (5) Vout A Vsig gmR 1+gmRs or (6) (VDD-VD)mp. VpD-Vp+mRpVs |A, Step Five: It's now time to set the value of an entity and calculate the other ones. First, note from (1) and (2) that Ip controls Rp and vice versa. Say we want Ip DD-V1mA = 0.001 A. For that, VDD-VD Rp 0.001 First, set either Rp or /p and calculate the other. For example, you could decide to design for Rp 1 kn, and use (2) to compute the equivalent value of Ip. Alternatively, you could for example decide to design for Ip 1 mA and use (1) to compute the equivalent value of Rp. It is up to you what you want to do. Second, after you do that, note that you also have ls Ip. VDD-VDmRp=M for some M >2 (per design Third, use (6) to solve for Vs such that |Ay| = vpp-vp+9mKpVs requirements). You should be able to see that the larger M is, the smaller Vs will be. Whatever you choose to set M, your solution for Vs should be strictly positive. Fourth, using the value of Vs found above, compute Rs using (3) Fifth, compute Vps = Vp - Vs = VpD- Rpi-Vg. Also, assuming Q1 is operating in the active region, we have Ip (Vcs- V.)2, which means Vcs = V; ± 2/p However, because, we want Vas> V compute Vs as 2Ip VGS = V (7) Sixth, make sure VDs > VGs-Ve, which, combined with VGs > Ve, would verify the active region operation assumption. If that is not the case, then you need to go back and set Rp or Ip to a different value and re-compute everything else. If that still doesn't work, then go back to the beginning, i.e., Step One, set VDD to different value and re-start the design process. Only move on from here after verifying that you indeed have V Ds> VGs Vt Seventh, when done verifying the active region operation, using (7) and given that Ves = VG - Vs, compute V as 21p Vs G = V6s+ Vs = V¢ (8) Step Six: Using Thevenin Equivalence, the DC circuit in Figure P3a can be redrawn as shown on Figure P3b VDD RD VGG Q1 RGG 2N7000 RS w In Figure P3b, RGG = RG,//RG,. You are required to design your amplifier such that both RG, and RG, 10 kN. This condition will be met if your design is such that 10 kn (8) RGG10 k because the parallel equivalence resistance of two or more resistors is smaller than the smallest resistors. So, go ahead and pick an RgG value such that (8) is verified. The voltage VGG in Figure P3b can be calculated a couple different ways. First, recalling that le = 0 A RcVo: Hence Ra(VDD 0) +0 =Re+RG2 Re,+RG we and knowing the value of VG (calculated in the previous step), notice that VGG VG Recall also that VG can be expressed as VeG have that (9) RGa VpD VGG=VG BGRG RGRG and vou have picked a value for RGG in the - Step Seven: Now, you know that RGG = R¢,//RG2 R+R previous step. Moreover, in (9), you know the value of VcG-. What is left to do in order to find (the is to solve the system of two equations unknowns) RG, and R RG (10) VGG -VpD RG+RG RG RGz RGG +RG RGs definitely solve (10) for Re, and Again, the values of VGG and RGG are known at this point. So, you can RG In fact, the two equations in (10) can be rearranged to get (11) Vpp RGG RG VGG (12) and Vpp -RGG VDp-VGc RG Use (11) and (12) to compute RG, and R This marks the end of design process. Using Multisim, you can then verify the appropriateness your design and/or if all the requirements (above) are verified Your design needs to be turned in Isidore. Write and upload a PDF report. Make sure to include the following items in your report 1. Show your handwritten calculations. 2. Show Multisim DC simulation (use multimeters or probes to measure Ig, Ip, Is, Vas, and Vps) and AC simulation (use the Agilent Oscilloscope to show waveforms of vin and Vout, as well as their peak-to-peak voltage measurements, and compute the absolute value of the voltage gain peak-to-peak coltage of Vout) of your design. as |A = peak-to-peak voltage of vin Note: For AC simulations, use a 5 kHz sinusoidal waveform for v Make sure the peak-to-peak voltage of vin is not too large so you can fully experience and verify the voltage gain of your amplifier. Bear in mind that you will never see an output waveform vout, whose voltage peak- to-peak is higher than VDD - Vss = VDD - O V = VpD no matter what |A,| is. Moreover, set capacitors C and Cc, to values between 1 uF and 3.3 uF. peak-to-peak coltage of out to what you get to what it should theoretically be. 3. Compare |A, peak-to-peak voltage of vin Derive and compute the input resistance RIN and the output resistance Rour of your amplifier? 4.

Answer 1

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