Question

1. Implement the circuits as described below.
   1. A priority encoder has four inputs, D₀, D₁, D₂ and D₃. D₀ has the highest priority and D₃ the lowest. The encoder has two outputs X and Y. Implement the priority encoder.
   2. Design a one-input, one-output Finite State Machine (FSM) that operates as a serial 2’s complementer. The FSM accepts a string of bits from the input and generates the 2’s complement of each bit at the output. The circuit can be reset asynchronously to start and end the operation. Use D-flip-flops.

Answer 1

In question a we have highest priority bit D3 so if d3 is high what ever the other input output is has to be 11 and D0 has the lowest priority so when d0 is high output will be 00

Here we are using valid bit which will be zero only when all inputs are zero

Ds D2 D, Do 'x y X X X 1 O X x X X 9 Can clearl bo secn thatthe condition an Valid bitto bo 1 ja that at lecs on ane cho input Should be, high D2 D3 V Do D

FOn x: 01 X D2+D3 X Some tar y D, Do 14 X

y= D. D3 Con seali2e the cicuit Noco we X 02
now for question 2 we first make state table then we further proceed for circuit i explained the FSM and its process in image itself

Answer Tho ootpot is o fcn all o inPut Unil to Hist 1 Owrg at cuhich dimo the Output is 1 outpot is the complément ed i/p tho .*. mar B 1/o A Tho State dicnam has two statej input State O Out put Complemant inp o04put SAate

pS In P NS Out A A 1 DA = A x y = A x y 0-FF CLK Rosot O
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