Question

Suppose you are designing a new computer system with the only restriction being that it must be a pipelined architecture. Write and explain two limitation that this restriction would produce on the instruction set for this machine.

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Could you please explain the question to me? I don't understand it!

Answer 1

Pipelining architecture increases the CPU instruction throughput - the number of instructions completed per unit of time. But it does not reduce the execution time of an individual instruction. In fact, it usually slightly increases the execution time of each instruction due to overhead in the pipeline control.
The increase in instruction throughput means that a program runs faster and has lower total execution time.

Hence, the major limitations that I could think of which could arise in a pipelined architecture are:

• Pipeline latency. The fact that the execution time of each instruction does not decrease puts limitations on pipeline depth;
• Imbalance among pipeline stages. Imbalance among the pipe stages reduces performance since the clock can run no faster than the time needed for the slowest pipeline stage;
• Pipeline overhead. Pipeline overhead arises from the combination of pipeline register delay (setup time plus propagation delay) and clock skew.