A certain computer provides its users with a virtual memory space of 2^32 bytes. The computer...
A certain computer provides its users with a virtual memory space of 2^32 bytes. The computer has 2^18 bytes of physical memory. The virtual memory is implemented by paging, and the page size is 4,096 bytes. A user process generates the virtual address 11123456 hexadecimal.
a. How many entries are there in the page table?
b. Explain how the system establishes the corresponding physical location.
Homework Answers
The virtual address in binary form is
| 1 | 1 | 1 | 2 | 3 | 4 | 5 | 6 |
| 0001 | 0001 | 0001 | 0010 | 0011 | 0100 | 0101 | 0110 |
page size is is 4096=2^12, the page table size is 2^32-2^12=2^20. the low-order 12 bits (456->0100 0101 0110) are used as the displacement into page, the rest 20 bits (11123->0001 0001 0001 0010 0011) are used as the displacement in the page table.
Add Answer to:
A certain computer provides its users with a virtual memory
space of 2^32 bytes. The computer...
A certain byte-addressable computer system has 32-bit words, a virtual address space of 4GB, and a...
A certain byte-addressable computer system has 32-bit words, a virtual address space of 4GB, and a physical address space of 1GB. The page size for this system is 4 KB. Assume each entry in the page table is rounded up to 4 bytes. a) Compute the size of the page table in bytes. b) Assume this virtual memory system is implemented with a 4-way set associative TLB (Translation Lookaside Buffer) with a total of 256 address translations. Compute the size...
Exercise l: Suppose that we have a virtual memory space of 28 bytes for a given process and physical memory of 4 page frames. There is no cache. Suppose that pages are 32 bytes in length. 1) How...
Exercise l: Suppose that we have a virtual memory space of 28 bytes for a given process and physical memory of 4 page frames. There is no cache. Suppose that pages are 32 bytes in length. 1) How many bits the virtual address contain? How many bits the physical address contain? bs Suppose now that some pages from the process have been brought into main memory as shown in the following figure: Virtual memory Physical memory Page table Frame #...
Question 31 supus Given a computer using a byte-addressable virtual memory system with a two-entry TLB,...
Question 31 supus Given a computer using a byte-addressable virtual memory system with a two-entry TLB, a 2-way set associative cache, and a page table for a process P. Assume cache blocks of size 16 bytes. Assume pages of size 32 bytes and a main memory of 4 frames. Assume the following TLB and page table for Process P: TLB 03 4 هما 0 1 2 3 4 5 6 7 Page Table f Vali d 1 1 0 2...
17. A computer system implements a paged virtual memory system. Assume a 16-bit virtual address space...
17. A computer system implements a paged virtual memory system. Assume a 16-bit virtual address space and a 24-bit physical address space. Assume that the first 6 bits of a virtual address index the page table and the rest of the bits are the page offset. A process has the following indexed page table. Index Page Table Entry (PTE) 0x3800 0x3600 0x3200 0x1000 2 3 Each page table entry qives a hexadecimal page frame addresses. Translate the following two hexadecimal...
Given a virtual memory configuration with: • 4 TB virtual memory space • 32 GB physical...
Given a virtual memory configuration with: • 4 TB virtual memory space • 32 GB physical memory space • 16 KB page size How many bits are needed for the virtual address? Choose... How many bits are needed for the physical address? Choose... How many bits in the address correspond to page offset bits? Choose... - How many bits will the virtual page number (VPN) be? Choose... - How many bits will the physical page number (PPN) be? Choose... →...
3. Virtual Memory (20 points) An ISA supports an 8 bit, byte-addressable virtual address space. The...
3. Virtual Memory (20 points) An ISA supports an 8 bit, byte-addressable virtual address space. The corresponding physical memory has only 256 bytes. Each page contains 32 bytes. A simple, one-level translation scheme is used and the page table resides in physical memory. The initial contents of the frames of physical memory are shown below. VALUE address size 8 bit byte addressable each byte of addressing type memory has its own address 32 B page size physical memory size 256...
The RISC-V 32-bit architecture supports virtual memory with 32-bit virtual addresses mapping to 32-bit physical addresse...
The RISC-V 32-bit architecture supports virtual memory with 32-bit virtual addresses mapping to 32-bit physical addresses. The page size is 4Kbytes, and page table entries (PTEs) are 4 bytes each. Translation is performed using a 2-level page table structure. Bits 31:22 of a virtual address index the first-level page table. If the selected first-level PTE is valid, it points to a second-level page table. Bits 21:12 of the virtual address then index that second-level page table. If the selected second-level...
Suppose we have 2^20 bytes of virtual memory and 216 bytes of physical main memory. Suppose...
Suppose we have 2^20 bytes of virtual memory and 216 bytes of physical main memory. Suppose the page size is 2^8 bytes. a) How many pages are there in virtual memory? b) How many page frames are there in main memory? c) How many entries are in the page table for a process that uses all of virtual memory?
Consider a simple paging system with the following parameters: 232 bytes of physical memory; page size...
Consider a simple paging system with the following parameters: 232 bytes of physical memory; page size of 210 bytes; 216 pages of logical address space. How many bits are in a logical address? How many bytes in a frame? How many bits in the physical address specify the frame? How many entries in the page table?
Suppose we have 212 bytes of virtual memory and 27 bytes of physical main memory. Suppose the pag...
Suppose we have 212 bytes of virtual memory and 27 bytes of physical main memory. Suppose the page size is 24 bytes. a) How many pages are there in virtual memory? b) How many page frames are there in main memory? c) How many entries are in the page table for a process that uses all of virtual memory?
Exercise l: Suppose that we have a virtual memory space of 28 bytes for a given process and physical memory of 4 page frames. There is no cache. Suppose that pages are 32 bytes in length. 1) How many bits the virtual address contain? How many bits the physical address contain? bs Suppose now that some pages from the process have been brought into main memory as shown in the following figure: Virtual memory Physical memory Page table Frame #...
Question 31 supus Given a computer using a byte-addressable virtual memory system with a two-entry TLB, a 2-way set associative cache, and a page table for a process P. Assume cache blocks of size 16 bytes. Assume pages of size 32 bytes and a main memory of 4 frames. Assume the following TLB and page table for Process P: TLB 03 4 هما 0 1 2 3 4 5 6 7 Page Table f Vali d 1 1 0 2...
17. A computer system implements a paged virtual memory system. Assume a 16-bit virtual address space and a 24-bit physical address space. Assume that the first 6 bits of a virtual address index the page table and the rest of the bits are the page offset. A process has the following indexed page table. Index Page Table Entry (PTE) 0x3800 0x3600 0x3200 0x1000 2 3 Each page table entry qives a hexadecimal page frame addresses. Translate the following two hexadecimal...
Given a virtual memory configuration with: • 4 TB virtual memory space • 32 GB physical memory space • 16 KB page size How many bits are needed for the virtual address? Choose... How many bits are needed for the physical address? Choose... How many bits in the address correspond to page offset bits? Choose... - How many bits will the virtual page number (VPN) be? Choose... - How many bits will the physical page number (PPN) be? Choose... →...
3. Virtual Memory (20 points) An ISA supports an 8 bit, byte-addressable virtual address space. The corresponding physical memory has only 256 bytes. Each page contains 32 bytes. A simple, one-level translation scheme is used and the page table resides in physical memory. The initial contents of the frames of physical memory are shown below. VALUE address size 8 bit byte addressable each byte of addressing type memory has its own address 32 B page size physical memory size 256...
Most questions answered within 3 hours.
-
Where is the error in this code sequence?
String s1 = "Hello";
String s2 = "ello";...
asked 10 months ago -
Financial data for Joel de Paris, Inc., for last year
follow:
Joel de Paris, Inc.
Balance...
asked 10 months ago -
Consider this reaction:
Al2(SO4)3 (aq)+ BaCl3
(aq) Al2Cl6 (aq)- +
3BaSO4(s) . What is the...
asked 10 months ago -
Suppose that Savneet is considering increasing her
recent random sample from 20 car rentals to 40...
asked 10 months ago -
Trucks arrive at an unloading terminal at an average rate of 120
per hour.
Trucks arrive...
asked 10 months ago -
Why are methanol and ethanol completely soluble in water while
octanol is not very little soluble....
asked 10 months ago -
A facilities manager at a university reads in a research report
that the mean amount of...
asked 10 months ago -
When the CuSO4 is rehydrated by adding water to the anhydrous
compound, is this an endothermic...
asked 10 months ago -
A ray of sunlight is passing from diamond into crown glass; the
angle of incidence is...
asked 10 months ago -
A block of mass 0.249 kg is placed on top of a light, vertical
spring of...
asked 10 months ago -
how do the kidneys compensate in the presences of acidosis
a) trigger hyperventilate
b) reserve acid...
asked 10 months ago -
Question 501 pts
The rental rate of capital to the firm increases. Which of the
following...
asked 10 months ago