Question

For this problem you will design a circular bit shifter in VHDL. These circuits are especially useful for aligning signals in communications equipment. Your bit shifter should have a 4-bit input, a 4-bit output, and a 2-bit shift amount. The shift amount will specify how many bits are to be shifted, 0, 1, 2, or 3 bits. To perform a circular shift, take the N least significant bits, and put them in the most significant position. For example, 1010 shifted by 1-bit is equal to 0101.

Answer 1

library ieee;
use ieee.std_logic_1164.all;

entity circular_bit_shifter is
   port(   din        : in std_logic_vector(3 downto 0);
       shift_amount   : in std_logic_vector(1 downto 0);
       dout       : out std_logic_vector(3 downto 0)
   );
end circular_bit_shifter;

architecture arch of circular_bit_shifter is

signal reg : std_logic_vector(3 downto 0);

begin

process (din, shift_amount)

begin

   case (shift_amount) is
       when "00"=> reg<=din;
       when "01"=> reg<=din(0)&din(3 downto 1);
       when "10"=> reg<=din(1 downto 0)&din(3 downto 2);
       when "11"=> reg<=din(2 downto 0)&din(3);
       when others=> null;
   end case;

end process;

dout <= reg;

end arch;

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