Question

Suppose we have a 32-bit MIPS processor, which includes a 2-way set associative data cache with capacity 16384 bytes, 16 bytes block, and a least recently used (LRU) replacement policy. Assume that the cache is empty (all valid bits are 0) before the following code is executed. lw $t1, 0x1040($0) lw $t2, 0x2044($0) lw $t3, 0x3048($0) lw $t4, 0x1044($0) lw $t5, 0x504c($0) lw $t6, 0x3040($0) For each of the six assembly instructions above, state i) the set field value for the accessed address, ii) the tag field value, and iii) if the instruction results in a cache hit or a cache miss. Your solution:

Answer 1

Binary 16 - bit two complenent for decimal Integer this is a decimal to two's complement converter. These converters do not complement their input, that is, they do not negative if they just covert it to or from two's complement from. For r - example - 7 converts to 11111 0 0 1(to 8 bits) decimal to two's complement * ener a positive or negative integer * set the number f bits for the two's complement representation * click convert to convert * click clear to Reset the form and start from scratch. If you wan to convert another Number, just type over the original number and\r\n click convert - there is no need to click clear first two complement to Decimal * enter two's complement number - a string f 0s and 1s * set the number f bits to match the length f the input. * click convert to convert * click \r\n