Question

solve 1 to 4 DEMUX by using cmos and draow the lgic gate by using nand

Answer 1

The following image shows the diagram as well as the implementation using NAND gates. The common input F, which is connected to all the NAND gates and that will be selected to the output by using the selection lines A & B.

Operation:

When the value of selection lines A & B are 00, the output line 0 will produce the output ie F will be driven to the output line 0. Please see inside the DMX to understand more.

4 output . 00 U U . . . . . . . . . . . . . . . . . .

When the value of selection lines A & B are 01, the output line 1 will produce the output ie F will be driven to the output line 1

1x4 Demultiplexer... . . . . . . . . . . . . . . . . . . . . . . :: Common Input F 4 output OMX IN n 1 . . . . . . . . .

When the value of selection lines A & B are 10, the output line 2 will produce the output ie F will be driven to the output line 2..

.... 1x4 Demultiplexer. 4 output Common Input F- DMX

When the value of selection lines A & B are 11, the output line 3 will produce the output ie F will be driven to the output line 3.

1x4 Demultiplexer 4 output Common Input F

Complete implemenation is shown below.

1x4 Demultiplexer . . . . . . . . . . . . . . . . . . O 4 output lines . Common Input DMX . . . . . . . . . . . . . . . . . . . . . . Colon i a . . . . Select Lines A&B ..... .. . . . . Color Select Lines A &B i n . . . . . . . . . . . . . . . . . . . . . V . Common Input Output 0 . . . . . . . . · Outnut 1 . . . . . . . . . . 4 output lines . Output 2. . . . . . . . . . Output 3 . . . . . . . .

The truth table is given below.

A	B	Output
0	0	F in Output0
0	1	F in Output1
1	0	F in Output2
1	1	F in Output3

Thank You.