we want to implement the function ?(?3,?2,?1,?0)=∑?(1,4,5,8,11,12,13). Assume complemented inputs are available at no cost.
c. Use Shannon’s Expansion Theorem to implement H using a 2-to-1 multiplexer with z3 as the select line, AND gates, and OR gates. Also, show the expression for H that uses Shannon’s Expansion Theorem.
d. Use Shannon’s Expansion Theorem to implement H using a 4-to-1 multiplexer with z2 and z1 as the select lines. Also, show the expression for H that uses Shannon’s Expansion Theorem.



we want to implement the function ?(?3,?2,?1,?0)=∑?(1,4,5,8,11,12,13). Assume complemented inputs are available at no cost. c....
Implement f(a,b,c) = Σm(0,2,6,7) using only 2-to-1 muxes. All inputs are available complemented and uncomplemented. Use as few muxes as possible. (Minimum is 1!) 2. Implement f(a,b,c) = Σm(1,2,3,5,6) using only 2-to-1 muxes. There are four possible solutions. You must find two. All inputs are available complemented and uncomplemented. Use as few muxes as possible. (Minimum is 2!)
Use Shannon’s expansion to implement the following function with a 4-1 multiplexer, using A and B as the control signals. You may also use any additional basic gates needed. ?(?,?,?,?) = ??? + ??? + ??? + ???
Implement the function f (A,B,C,D) summation(m(0,2,5,8,12,13,14,15)) using: a. A 4-to-1 multiplexer, and external gates. Choose inputs A and B as the select lines. b. A 4-to-16 decoder and OR gate c. A PLA
Design a 6 to 1 multiplexer (inputs A,B,C,D,E,F,S[2:0] and output Z) (a) Implement the 6 to 1 multiplexer using only CMOS NORs, NANDs and inverters. ( b) Implement the 6 to 1 multiplexer using only CMOS transmission gates and inverters. (c) Which approach is better and why?
Implement the function F (x,y,z)= (not x)(not z)+ xy using a. One 4-to-1 multiplexer and any additional inverters. Show your truth-table and justify your choice of select inputs. b. One 2-to-1 multiplexer and the minimal number of gates. Show the truth table used to derive your circuit.
Question 2: Combinational Logic (15 points) Implement the following Boolean function Z(A,B,C,D) = {(1,2,5,7,8,10,11,13,15) 2.1 (5 points) Write the truth table for Z. 2.2 (5 points) Implement Z using a single 16:1 multiplexer. Make sure that you mark all inputs and outputs clearly. 2.3 (5 points) Implement Z using an 8:1 multiplexer and all necessary gates. Make sure that you mark all inputs and outputs clearly.
f = w1w2 + w1w3 + w2w3 We wish to implement this function using only 2-to-1 multiplexers. Shannon’s expansion using w1 yields f = w1(w2w3) + w1(w2 + w3 + w2w3) Can you show me the simplification w1 = w1(w2w3) + w1(w2 + w3) How we get this?
need explain...
5. Implement the function f(a,b,c,d) = 2 m(0,1,3,4,5,7,9,10,11,13) a. (3 points) using an 8-to-1 multiplexer and as few inverters as possible, and b. (4 points) using a 4-to-1 multiplexer and as few additional gates as possible.
4 BIT ALU due 4/24 Midnight Implement a 4 bit ALU as covered in class. INPUTS: A – 4 bit 2’s complement number B – 4 bit 2’s complement number Control – determines ALU functionality OUTPUT: If control = 00, then output = A AND B If control = 01, then output = A OR B If control = 10, then output = A ADD B If control = 11, then output = A SUBTRACT B REQUIREMENTS: 1) You are...
Class 24 1. Given the shorthand POS expression F(a,b,c,d) П M (0,6,7,8) (b + c + d)(a + D+ ē): a. (25 points) Implement F using one 4-to-16 decoder and one OR gate of any size. b. (25 points) Implement F using four 2-40-4 decoders and one OR gate of any size. c. (25 points) Implement F using just two 8-to-3 encoders, NOT gates, and one AND gate of any size. Hint: given NOT gates and an AND gate to...