![Verilog Assignment l. (a) Use Modelsim to debug and compile a while loop statement syntax while expression statement module while example reg [5:0] location reg [7:0] data. always (data or location) begin. location If Data is 0, then location is 32 (invalid value) if (data 0) begin location. 32 end else begin while (data [0] 0) begin location. location 1. data data 1 end end. display (DATA 8b LOCATION d, data, location) end initial begin #1 data. 8 b11 #1 data. 8 b100 #1 data. 8 b1000 1 data. J: 8 b1000 0000 #1 data. 8 bo #1 finish; end endmodule (b) After running and simulating this code, printout the results. Provide explanation in a short paragraph (few lines) what this while example did (in the code), based on your output.](http://img.homeworklib.com/questions/93023c20-bc0f-11ec-8650-e16e803e34b9.png?x-oss-process=image/resize,w_560)
Homework Answers
After runnig this code i got the following output:
Data=00000011 LOCATION= 0
Data=00000001 LOCATION= 2
Data=00000001 LOCATION= 3
Data=00000001 LOCATION= 7
Data=00000000 LOCATION=32
so lets start with the first if condition, if data is 0 then location 32,as we can see the 5th data value is 0 location is 32.
coming to else part, while loop works as follows:
data[0] means first element of the data if it is 0 the increment location by 1 and perform binary right shift adding 0 to msb of the data say 00000011 >> 1 will give 00000001, this while continues till data[0] is 0.
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Use Modelsim to debug and compile a while loop statement syntax: while (< expression >) <...
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using namespace std;
int main() {
//variables here
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}
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6-1 Test and debug the Invoice Application
i need help with this please.. all help is appreciated
Source code Java:
import java.util.Scanner;
import java.text.NumberFormat;
public class InvoiceApp {
public static void main(String[] args) {
Scanner sc = new Scanner(System.in);
String choice = "y";
while (!choice.equalsIgnoreCase("n")) {
// get the input from the user
System.out.print("Enter customer type (r/c): ");
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System.out.print("Enter subtotal: ");
double subtotal = sc.nextDouble();
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double discountPercent = 0.0;
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program an 8-to-1 multiplexor using verilog output of time table from 1 - 2047 For example...
program an 8-to-1 multiplexor using verilog
output of time table from 1 - 2047
For example output should look like....
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table] ----------
Here is example of 4x1 Multiplexor ... Just need code
for 8x1 Multiplexor
module DecoderMod(s, o);
input [1:0] s;
output [0:3] o;
wire [1:0] inv_s;
not(inv_s[1], s[1]);
not(inv_s[0], s[0]);
and(o[0], inv_s[1], inv_s[0]);
and(o[1], inv_s[1], s[0]);
and(o[2], s[1], inv_s[0]);
and(o[3], s[1], s[0]);
endmodule
module MuxMod(s, d, o);
input [1:0] s;
input [0:3]...
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PLEASE READ AND CODE IN BASIC C++ CODE. ALSO, PLEASE CODE USING
THIS DO WHILE LOOP AND FORMAT:
#include <iostream>
using namespace std;
int main() {
//variables here
do {
// program here
}while (true);
}
Objectives To learn to code, compile and run a program containing SELECTION structures Assignment Write an interactive C++.program to have a user input the length of three sides of a triangle. Allow the user to enter the sides...
6-1 Test and debug the Invoice Application
i need help with this please.. all help is appreciated
Source code Java:
import java.util.Scanner;
import java.text.NumberFormat;
public class InvoiceApp {
public static void main(String[] args) {
Scanner sc = new Scanner(System.in);
String choice = "y";
while (!choice.equalsIgnoreCase("n")) {
// get the input from the user
System.out.print("Enter customer type (r/c): ");
String customerType = sc.next();
System.out.print("Enter subtotal: ");
double subtotal = sc.nextDouble();
// get the discount percent
double discountPercent = 0.0;
switch(customerType) {...
program an 8-to-1 multiplexor using verilog
output of time table from 1 - 2047
For example output should look like....
--------- [Start of table] ---------------------------- [End of
table] ----------
Here is example of 4x1 Multiplexor ... Just need code
for 8x1 Multiplexor
module DecoderMod(s, o);
input [1:0] s;
output [0:3] o;
wire [1:0] inv_s;
not(inv_s[1], s[1]);
not(inv_s[0], s[0]);
and(o[0], inv_s[1], inv_s[0]);
and(o[1], inv_s[1], s[0]);
and(o[2], s[1], inv_s[0]);
and(o[3], s[1], s[0]);
endmodule
module MuxMod(s, d, o);
input [1:0] s;
input [0:3]...
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