Please write in VHDL code:
Design the minimal SOP circuit to implement the function F(a,b,c) = MINTERMS(1,5,6,7).Create the gate-level structural architecture named struct1 of your design.
Write a testbench to test struct1 above. Hold each input vector constant for 10ns. Your testbench needs verify the correct output for each of the eight input vectors. Your testbench should also include tests for the following transitions: 001->101, 001->110, 001->111, 101->001, 101->110, 101->111, 110->001, 110->101, 110->111, 111->001, 111->101, and 111->110. Hold each of these input vectors constant for 10ns before and after transistions.
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Please write in VHDL code: Design the minimal SOP circuit to implement the function F(a,b,c) =...
Design a circuit with three inputs (A, B, C) and two outputs (F1, F2). The first output F1 is logic 1 if the number of l’s in the binary number is less than the number of O's, otherwise F1 is logic 0. The second output F2 is 1 if the binary input is 2, 4, 5, 6,7 otherwise the second output F2 is logic 0. a. Derive the truth-table for F1 and F2 as a function of the 3 inputs....
Using Structural Modeling in VHDL write the
code for:
An Arithmetic Logic Unit (ALU) shown in the
figure below. A (16-bit), B
(16-bit), Opcode (3-bit), and
Mode (1-bit) are the inputs; and
ALUOut (16-bit) and Cout (1-bit) are the outputs
of the design. A and B hold the values of the operands. Mode and
Opcode together indicate the type of the operation performed by
ALU.
The ALU components ARE:
-Arithmetic Unit that consists of one 16-bit
adder, 16-bit subtractor, 16-bit...
Please show the steps 1. Write the minimum SOP expression of F(A,B,C)=∑(2,3,4,6) with “don't-care” conditions, d(A,B,C)=(0,1,5) 2. Write the minimum POS expression of F(A,B,C,D)=Π(2,3,11,12,15) with don't-care conditions, d(A,B,C,D)= (0,7,10,14) 3. What is the critical path delay for the given logic circuit? Assume that a 2-input OR gate has a propagation delay of 21 ns, the 2-input AND gate has a propagation delay of 14 ns, and the NOT gate has a propagation delay of 9 ns. A. 58 ns B. 57 ns...
Finite state machine (FSM) counter design: Gray
codes have a useful property in that consecutive numbers differ in
only a single bit position. Table 1 lists a 3-bit modulo 8 Gray
code representing the numbers 0 to 7. Design a 3-bit modulo 8 Gray
code counter FSM.
a) First design and sketch a 3-bit modulo 8 Gray code counter
FSM with no inputs and three outputs, the 3-bit signal
Q2:0. (A modulo N counter counts from 0 to N −...
number 4 and 5 please!
PROBLEM STATEMENT A logic circuit is needed to add multi-bit binary numbers. A 2-level circuit that would add two four-bit numbers would have 9 inputs and five outputs. Although a 2-level SOP or POS circuit theoretically would be very fast, it has numerous drawbacks that make it impractical. The design would be very complex in terms of the number of logic gates. The number of inputs for each gate would challenge target technologies. Testing would...
write a code on .C file
Problem Write a C program to implement a banking application system. The program design must use a main and the below functions only. The program should use the below three text files that contain a set of lines. Sample data of these files are provided with the assessment. Note that you cannot use the library string.h to manipulate string variables. For the file operations and manipulations, you can use only the following functions: fopen(),...
how slove 4-34, 4-35, 4-36??? I dont know that! please hlep me!
306 □ CHAPTER 4/SEQUENTIAL CIRCUITS OTABLE 4-16 State Table for Problem 4-33 Next State Input Output Present State 4-36 4-37 0 0 0 0 4-38 Design the circuit specified by Table 4-14 and use the sequence from Problen 4-31 (either yours or the one posted on the text website) to perform an automatic logic simulation-based verification of your design. 4 433. The state table for a sequential circuit...
Write a program that demonstrates use of programmer - defined
data structures. Please provide code! Thank you.
Here are the temps given:
January 47 36
February 51 37
March 57 39
April 62 43
May 69 48
June 73 52
July 81 56
August 83 57
September 81 52
October 64 46
November 52 41
December 45 35
Janual line Iranin Note: This program is similar to another recently assigned program, except that it uses struct and an array of...