Question

In C programming language for Tiva Launchpad, what are the differences between following instructions?

LDR                R0, [R1]

LDRH            R0, [R1]

LDRB             R0, [R1]

Answer 1

Load instructions (in general) come in the follow form:

LDR {type}{cond}    Rt, [Rn {, #offset}]

The 'type' is optional and is described in the table above, where you can choose to work with halfwords, bytes as well as signed or unsigned bytes or halfwords. You also have the option to load or store multiple registers.

You also have the option of adding a condition code to the instruction (cond), which is used to set the condition flags held in the Current Program Status Register (CPSR).

1. The LDR pseudo-instruction loads a register with either:

• a 32-bit constant value

• an address.

Syntax

The syntax of LDR is:

LDR{condition} register,=[expression | label-expression]

where:

condition:

is an optional condition code.

register:

is the register to be loaded.

expression

evaluates to a numeric constant:

• If the value of expression iswithin range of a MOV or MVN instruction, the assembler generates the appropriate instruction.

• If the value of expression is not within range of a MOV or MVN instruction, the assembler places the constant in a literal pool and generates a program-relative LDR instruction that reads the constant from the literal pool.

  The offset from the pc to the constant must be less than 4KB. You are responsible for ensuring that there is a literal pool within range. See LTORG directive for more information.

label-expression

is a program-relative or external expression. The assembler places the value of label-expression in a literal pool and generates a program-relative LDR instruction that loads the value from the literal pool.

The offset from the pc to the value in the literal pool must be less than 4KB. You are responsible for ensuring that there is a literal pool within range. See LTORG directive for more information.

If label-expression is an external expression, or is not contained in the current area, the assembler places a linker relocation directive in the object file. The linker ensures that the correct address is generated at link time.

2.

Syntax

LDR[condition]B dest, addr_mode

where:

condition	One of 16 conditions. Refer to Condition Code Status.
dest	destination register

Description:

The LDRB instruction loads a byte from addr_mode into dest . This byte is zero-extended into a 32-bit word enabling 8-bit memory data to be manipulated. It also enables PC-relative addressing if used as a base register. The condition needs to be a valid value; else the instruction is rendered an NOP.

3. LDRB (Load Register Byte) loads a byte from memory, zero-extends it to form a 32-bit word, and writes the result to a general-purpose register.

LDR[condition]H dest, addr_mode

where:

condition	One of 16 conditions. Refer to Condition Code Status.
dest	destination register

Description

The LDRH instruction loads a halfword from addr_mode into dest . The halfword is zero-extended into a 32-bit word enabling 16-bit memory data to be manipulated. It also enables PC-relative addressing if used as a base register. The condition needs to be a valid value; else the instruction is rendered an NOP.