Question

Virtual memory address translation: a) Consider a machine with a physical memory of 8 GB, a page size of 4 KB, and a page table entry size of 4 bytes. How many levels of page tables would be required to map a 52-bit virtual address space if every page table fits into a single page? b) Without a cache or TLB, how many memory operations are required to read or write a page in physical memory? c) How much physical memory is needed for a process with three pages of virtual memory?

Answer 1

Answer a

Physical memory size = 8 GB = 2³³ Bytes

Page Size = 4 KB = 2¹² Bytes

Page Table Entry Size = 4 Bytes => #Entries in page table = 2¹²/4 = 2¹⁰

Logical Address Space = 2⁵² Bytes => #Pages = 2⁵²/2¹² = 2⁴⁰ => #Entries = 2⁴⁰

# First Level Page tables = Total entries / #entries in one page table = 2⁴⁰/2¹⁰ = 2³⁰

# Second Level Page tables = Total entries of first level / #entries in one page table = 2³⁰/2¹⁰ = 2²⁰

# Third Level Page tables = Total entries of second level / #entries in one page table = 2²⁰/2¹⁰ = 2¹⁰​​​​​​​

# Fourth Level Page table = Total entries of third level / #entries in one page table = 2¹⁰/2¹⁰ = 1​​​​​​​

So total 4 level of page tables required.

Answer b

Without a cache or TLB, There will be 4 memory accesses to read page tables to get frame number and then 1 memory access for actual data. => Total 5

Answer c

Physical memory = 3*4 = 12 KB