Draw the block diagram for a 4-1 MUX; create the truth table for
that.
Draw the block diagram for a 4-1 MUX; create the truth table for that.
d) e) f) g) Draw block diagram of a 8x1 multiplexer (mux), obtain truth table and write VHDL code. Draw block diagram of a 1x8 demultiplexer (demux), obtain truth table and write VHDL code Draw block diagram of a 3x8 decoder, obtain truth table and write VHDL code Draw block diagram of a 8x3 priority encoder, obtain truth table and write VHDL code.
Create a truth table to implement AND logic using only NAND gates. Draw the circuit diagram (schematic) for the implementation. Do the same for OR logic using only NOR gates.
4. Draw a system diagram and generate a truth table for the function. F(X, Y, Z) - XY Y.Z+Z'Y
Question 1 Draw the Truth Table for the ladder logic diagram shown in figure. A E B A
2. Question Draw the truth table for the following circuit diagram
Simulate the following truth table using a 4:1 MUX plus one inverter. A B C Y 0 0 0 1 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1
• Draw the truth table for a 3-of-8 multiplexer. Draw the logical diagram for a 3-of-8 decoder.
[4] (a) For the given expression draw the TRUTH TABLE Y = A B C+A.BC (b) From the truth table derive the POS EXPRESSION and implement it by basic gates (c) Redraw the logic diagram by using only universal gates. [1+1+2=4]
Draw the circuit diagram for the following truth table: These are the outputs from the circuit X Y These are the inputs to the circuit B C 0 0 1 0 0 0 0 1 D 0 1 0 1 1 1 You are only permitted to use AND, OR and NOT gates.
Simulate the following truth table using a 2:1 MUX and other logic gates. A B C Y 0 0 0 1 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1