I need help solving both the questions below and it is 109 instructions. 1. On machine...
I need help solving both the questions below and it is 109 instructions.
1. On machine X with a 4GHz CPU, there is a mix of four types of instruction:
|
Operation Type |
Frequency |
CPI |
|
Arithmetic |
50% |
1 |
|
Load |
20% |
5 |
|
Store |
10% |
3 |
|
Branch |
20% |
2 |
Suppose your program has 109 instructions, what is the total execution time?
2. On machine Y with a 1GHz CPU, a benchmark program consists of the following four types of instructions:
|
Instruction Type |
Number of Instructions |
CPI |
|
FP |
100x106 |
1 |
|
INT |
50x106 |
1 |
|
L/S |
200x106 |
10 |
|
Branch |
20x106 |
4 |
By how much we need to improve the CPI of L/S if we want the benchmark program to run two times faster?
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I need help solving both the questions
below and it is 109 instructions.
1. On machine...
Problem 1 Assume that a processor with a clock rate of 1 GHz clock runs a...
Problem 1 Assume that a processor with a clock rate of 1 GHz clock runs a benchmark program w mix of instructions given in the table below. Instruction class CPI FP INT Load/Store (L/S) Branch Instruction count 50 x 106 110 x 106 50 x 106 10 x 106 By how much must the CPI of L/S instructions be improved if the program is to run two times faster?
c. Performance: Company A's processor and Company B's processor are benchmarked on the same program. The...
c. Performance: Company A's processor and Company B's processor are benchmarked on the same program. The CPI of the component instructions that are executed in the program are shown above for each processor. Additionally, the number of instructions of each type is provided. Company A 5 Branch CPI Load/Store CPI Arithmetic CPI 7 1 Company B 4 Branch CPI Load/Store CPI Arithmetic CPI 9 1 Program Instruction Count Branch Load/Store Arithmetic CPL 1.2x109 1.67x1010 1.5x1011 i. Assume Company A has...
I need help with the following Computer Architecture question: Consider two different implementations, M1 and M2,...
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Please i need a good answer and a perfect answer.. i need unique answer use your own words. pleas...
please i need a good answer and a perfect answer.. i need unique
answer use your own words.
please i need a good answer and a perfect answer.. i need unique
answer use your own words.
please i need a good answer and a perfect answer.. i need unique
answer use your own words.
don't use handwriting
Q3:
a) Specify the two factors used to determine the capacity of
memory. Find out the memory capacity, if the number of bits...
Problem 1 Assume that a processor with a clock rate of 1 GHz clock runs a benchmark program w mix of instructions given in the table below. Instruction class CPI FP INT Load/Store (L/S) Branch Instruction count 50 x 106 110 x 106 50 x 106 10 x 106 By how much must the CPI of L/S instructions be improved if the program is to run two times faster?
c. Performance: Company A's processor and Company B's processor are benchmarked on the same program. The CPI of the component instructions that are executed in the program are shown above for each processor. Additionally, the number of instructions of each type is provided. Company A 5 Branch CPI Load/Store CPI Arithmetic CPI 7 1 Company B 4 Branch CPI Load/Store CPI Arithmetic CPI 9 1 Program Instruction Count Branch Load/Store Arithmetic CPL 1.2x109 1.67x1010 1.5x1011 i. Assume Company A has...
A program that executes 12.3x107 instructions is run on a pipelined processor. The table below provides the percentage of executed instructions for each type of instruction. Instruction Executed P ipeline CPU type instructions (%) w/o hazards ALU 29.4 Load 29.7 Store 14.7 Branch 26.2 2 (w/o prediction) 27% of the load instructions are followed by instructions that need the data being loaded, 47% of the branches are actually.not taken, please assume not taken prediction. a) Please determine the overall cycles...
Usc only the following MIPS instructions for assignment questions 3, 4 and 5: add, sub, addi, j, beq, bne, lw, sw. You may not need as many lines as we provide space for 4. (4 pts) Write a MIPS program starting at address 20 that writes a value of 488 to register $7. Next, you will test if register $10 is equal to register $7. If the values are equal, continue execution at address 48; otherwise set the value in...
6. What is the difference between a Direct map cache and Set associative cache. If we are looking for block #26, block 32 and block #10 in an 8 way set associative and 4 block direct mapped cache. Where can we find these blocks. (Show your work) 7. What are the differences between SRAM, DRAM, SDRAM, who implements SRAM and SDRAM 8. What is a DIMM, So-Dimm and DDR, list different versions of DDR, what are the differences between those...
2. Given Amdal's Law as shown below (1-2) Form A: T(0,N) 1 Form B:S(s) = (1-p)+ The 60% of program could be parallellized. Using latest compiler, the serial part of N 1) the program double its performance. If the program running on a 5 processor machine, calculate its whole speedup ? (4 marks) 2) What is the overall speedup if we make 90 % of a program run 10 times faster? (4 marks) V Four parts of a program need...
please i need a good answer and a perfect answer.. i need unique
answer use your own words.
please i need a good answer and a perfect answer.. i need unique
answer use your own words.
please i need a good answer and a perfect answer.. i need unique
answer use your own words.
don't use handwriting
Q3:
a) Specify the two factors used to determine the capacity of
memory. Find out the memory capacity, if the number of bits...
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