Question

I was given a problem from my tutor. And i will need your help. I am supposed to create/design a question without the help of an external book or anything regarding address decoding. This is to test my understanding of address decoding. Basically, I am supposed to set a question and solve the question myself, and it should be about address decoding. Will really appreciate it if you could help. Thanks [PS. Shouldnt be a common question and should be from your own understanding].

Answer 1

MEMORY ADDRESS DECODING

• The data bus of the CPU is connected directly to the data pins of the memory chip.

• Control signals RD (read) and WR (memory write) from the CPU are connected to the OE (output enable) and WE (write enable) pins of the memory chip, respectively.

• In the case of the address buses, while the lower bits of the addresses from the CPU goes directly to the memory chip address pins, the upper ones are used to activate the CS pin of the memory chip. It is the CS pin that along with RD/WR allows the flow of data in or out of the memory chip. No data can be written into or read from the memory chip unless CS is activated.

• he processor can usually address a memory space that is much larger than the memory space covered by an individual memory chip.
• In order to splice a memory device into the address space of the processor, decoding is necessary.
• For example, the 8088 issues 20-bit addresses for a total of 1MB of memory address space.
• However, the BIOS on a 2716 EPROM has only 2KB of memory and 11 address pins.
• A decoder can be used to decode the additional 9 address pins and allow the EPROM to be placed in any 2KB section of the 1MB address space.
• To determine the address range that a device is mapped into:
• 
• This 2KB memory segment maps into the reset location of the 8086/8088 (FFFF0H).
• NAND gate decoders are not often used.
  • Rather the 3-to-8 Line Decoder (74LS138) is more common.