Question

Operating Systems Questions (Please help if you can)

5. Explain the difference between a semaphore and a condition.

6. Show how the bakery algorithm conforms to the tenet of the protocol for critical section

problem.

1. What type of hardware support is required to implement cycle stealing?

2. Explain why does the use of dma result in the cpu memory accesses to slow down?

3. What is the difference between synchronous and asynchronous interrupts? Given an

example of each of them.

Answer 1

2.Generally DMA can be done in 3 ways: a) Burst mode b) Cycle stealing mode c) Transparent mode. In Burst mode the I/O sends a complete block of data to the memory after being granted the bus control by the CPU. So for this transferring time the CPU remains idle thus slowing down its performance.

in Cycle Stealing mode the I/O sends the data to memory by taking 1 cycle of CPU when the data is available. Thus for that 1 cycle the CPU remains idle but its efficiency is better than BURST MODE.

In Transparent Mode the I/O sends the complete block of data but it sends it whenever the CPU is not using the system bus. Thus it does not wastes any CPU cycle and is the most efficient DMA method.

5. By Semaphore we can achieve a concurrency of n processes(or threads) though the n is completely dependent on the system.  Condition variable allows a thread T to wait for completion of a given event on a particular object. Until that is satisfied, the thread waits to be awakened later by a signalling thread.

6. Bakery Solution , unlike Peterson's or Deker's solution( 2 Processes), is an N processes solution. This is mostly based on FCFS(First Come First Serve) idea. Every Process is given a token like thing consisting of ( Token No, Process Id), before entering the critical section. The token number is always generated in non decreasing order and the process having the lowest token number is most eligible to enter the critical section. Now if two processes have same token no then the deadlock( or tie) is broken by the process id. Thus it ensures the mutual exclusion property.

1. In Cycle stealing mode the I/O interface transfers only that much byte of data that can be sent in one CPU cycle without interfering the CPU's work. So it needs a Dual Ported RAM, so that multiple read-write accesses can be done at nearly same time.