Implement the parity function of N variables using threshold gates
Threshold gates are based on the called majority or threshold decision principle, which means that the output value depends on whether the arithmetic sum of values of its inputs exceeds a threshold. The threshold principle is general itself and conventional simple logic gates, such as AND and OR gates, are special cases of threshold gates. Thus, threshold logic can treat conventional gates as well as threshold gates in general, in a unified manner.
The parity function, which is 1 if and only if an even number of its inputs are logical 1. No logic circuit with polynomial (in n) number of unbounded fan-in AND-OR-NOT gates can compute it in constant-depth.
In Figure A) depth-2 logic network implementing parity for n = 4 is depicted. For an arbitrary n, its size is 2n – 1 + 1. A depth-2 threshold network for of four variables is shown in Figure B. For an arbitrary n only (n+1) gates are required.
Figure A
Figure B
1. Implement the four-input odd-parity function with AND and OR gates using bubbled inputs and outputs. Note: Rather than draw inverters explicitly, a common practice is to add “bubbles” to the inputs or outputs of a gate to cause the logic value on that input line or output line to be inverted.
Simplify the following Boolean function using K-map and implement it using only NAND gates ?(?, ?, ?, ?) = ?. ?. ?. ? + ?. ?. ?. ? + ?. ?. ?. ? + ?. ?. ?. ? + ?. ?. ?. ? + ?. ?. ?. ? + ?.?.?.? +?.?.?.? + ?.?.?.? + ?.?.?.?
Draw the even parity function below using basic logic gates (NOT, AND, OR). Input A Input B Input C Output 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1
1. Q(A,B,C,D) = ABC'+ A'BC+C'D'+AB'+B'C a) Implement the previous function using logic gates. b) implement the same function using a 16 input multiplexer (74150) only. (Hint: draw the truth table for Q)
Implement the function?(?, ?, ?) = ∑?(2,5,6,7)using one 4-to-1 multiplexer. You can use any other gates (AND,OR, Not , NoR).
Using mixed-logic technique, implement the logic function using only 2-input NOR (NOR2) gates and inverters: (1596) 3. F = ((A + BC)D) + C + DE
NAND and NOR gates are universal, which means that you can implement every possible Boolean function with them. Remember that the NOT gate can be implemented using either a NAND or a NOR. Implement the following functions using only NAND and NOT gates. Do not simplify the functions for this problem. a. (a + b) (c' +d) b. (a'b + b'c)' Implement the following functions using only NOR and NOT gates. c. (a + ab'c)' d. (((a + b)' +...
4. Implement the function using only NOR gates (20 pts) (A B+C).D Sketch the logic gate schematic and verify your circuit by truth table.
Implement the following Boolean function F = xy + x'y '+ y'z a) Using the AND, OR gates and reversing gates (NO) b) Using OR gates and reversing gates (NO) c) Using AND gates and reversing gates (NO) d) Using NAND gates and reversing gates (NO) e) Using NOR gates and reversing gates (NO)
Implement this Boolean Expression on a breadboard using NOR
gates
Part A: Z =XY+X 'Y' Implement this Boolean expression using only NOR gates. Apply De Morgan's law and Boolean laws for the expression to represent it only using NOR operation. Your implementation should use the minimum number of gates (4 NOR gates) required