(10) Write a simple Verilog program that takes in two 8 bit ASCII characters (In1 and In2) and outputs them in Lexicographical order. Have two outputs Out1 and Out2, where Out1 is first character (if listing in increasing order)
module lexicographicorder(in1, in2, out1, out2);
input [7:0] in1, in2;
output [7:0] out1, out2;
always@(in1, in2) begin
if(in1 < in2) begin
out1 = in1;
out2 = in2;
end
else begin
out1 = in2;
out2 = in1;
end
end
endmodule
(10) Write a simple Verilog program that takes in two 8 bit ASCII characters (In1 and In2) and ou...
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