Question

Question 4 State Machines (25 marks) a. (5 marks) A 3-bit Gray code counter advances on positive clock edges and generates outputs in the sequence: 000, 001, 011, 010, 110, 111, 101, 100. Draw the assigned state table for a state machine implementing this counter. b. (10 marks) For the Gray code counter in part a, derive (unoptimised) equations for the next state as a function of the current state. c. (10 marks) Consider the following sequence detector. In each clock cycle, one bit is received on serial_in. When the three most-recently received bits are "101", the sequence detector should output a 1 on z. Otherwise, it should output a 0. serial_in Sequence Detector clk Z Draw a state diagram for a state machine implementation of the sequence detector. Marks will be deducted for solutions which are excessively complex. Clearly state any assumptions you make.

Answer 1

a)

PRESENT STATE			NEXT STATE
G2	G1	G0	G2+	G1+	G0+
0	0	0	0	0	1
0	0	1	0	1	1
0	1	0	1	1	0
0	1	1	0	1	0
1	0	0	0	0	0
1	0	1	1	0	0
1	1	0	1	1	1
1	1	1	1	0	1

b)

bD G G210+ G2G1G0 +G2GGo G2G140 Git=2Gi Go 2G1G0 2G1G0 +92GIG0 + Got=G2Go G2G1G0 2G 0 +G2GSO

SO S2 Mealy State Machine with oveslap
State Table

STATE	PRESENT STATE		INPUT	NEXT STATE		OUTPUT
	Q1	Q0	serial_in	Q1+	Q0+	Z
S0	0	0	0	0	0	0
	0	0	1	0	1	0
S1	0	1	0	1	0	0
	0	1	1	0	1	0
S2	1	0	0	0	0	0
	1	0	1	0	1	1
UNUSED	1	1	0	X	X	X
	1	1	1	X	X	X

Kernauyk Maps Serialin serial.in Senialin O1 00 00 01 O1 01 |X| X X IT 10 Z=Serlalin Qit=Roserial in Sesialin

serial in Q1 x1 Den0 Q0 Den0 CLK Z x1. O