Question

A comparator circuit has two 1-bit inputs A and B and three 1-bit outputs G (greater), E (equal), and L (less than). That is, G is 1 if A > B (0 otherwise), E is 1 if A == B (0 otherwise), and L is 1 if A < B (0 otherwise).

     

a. Draw the truth table for a 1-bit comparator (the table has 2 inputs and 3 outputs).

b. Implement G, E, and L circuits using only NAND and NOT gates.

c.Using the 1-bit comparator as a building block (that is, drawing it as a 2-input/3-output box), construct a four-bit equality checker, such that output EQUAL is 1 if A[3:0] == B[3:0], 0 otherwise.

Answer 1

a) The truth table for a 1-bit comparator:

A	B	G	E	L
0	0	0	1	0
0	1	0	0	1
1	0	1	0	0
1	1	0	1	0

(b) Implementation of G, E, L circuits using NAND and NOT gates:

Using above truth table and K-Map, G=AB' , E=A XNOR B, L=A'B

(c) Construction of 4 bit equality checker using 1 bit comparator as building block:

Suppose, two 4 bit binary number A=A₃A₂A₁A₀ and B=B₃B₂B₁B₀ and E is equlity output of A and B.

A=B only if E=E₃E₂E₁E₀ where E_i is equality output of A_i and B_i .

Here is the implementation of 4 bit equality checker: