Question


Design a digital circuit that takes two 4-bit numbers A and B as input and generates output Z as follows: (20 points) - If A and B are odd numbers then Z-A-B. - If A and B are even numbers then Z-B-A 5. If A is an even number and B is an odd number then Z-A+B If A is an odd number and B is an even number then Z-A-B-1 Assume that you have access to as many as you need of AND, OR, INV, XOR gates and a single 4-bit FULL-ADDER. Hint: Example of an even binary number is 1110 and an odd binary number is 1011) (Hint: How many control inputs do you need? And how would you implement them?)
0 0
Add a comment Improve this question Transcribed image text
Answer #1

0 rclu Destgn tlouri. tha t s°, FroM the elata Le Cap Oded or eCa be Say fro LSs bet S0 bere S0, The table ђее Assume. odd 디2 ь, Ted-.the ul-bettu adder Cfreugt.hdguon belo 0 ckt Co 2

Add a comment
Know the answer?
Add Answer to:
Design a digital circuit that takes two 4-bit numbers A and B as input and generates...
Your Answer:

Post as a guest

Your Name:

What's your source?

Earn Coins

Coins can be redeemed for fabulous gifts.

Not the answer you're looking for? Ask your own homework help question. Our experts will answer your question WITHIN MINUTES for Free.
Similar Homework Help Questions
  • You are to design a circuit that calculates the Hamming distance between two 5-bit numbers. It...

    You are to design a circuit that calculates the Hamming distance between two 5-bit numbers. It takes two 5-bit binary numbers A4 A3 A2 A1 A0 and B4 B3B 2B1 B0 as inputs and returns the number of bits that are different between the two numbers as the 3-bit binary output O2 O1 O0. For example: *If the two input numbers were 10111 and 00001 then the output would be 011 as there are 3 bits different between them. *If...

  • Please design and implement a combinational circuit called 4-bit adder to add two 4-bit binary numbers,...

    Please design and implement a combinational circuit called 4-bit adder to add two 4-bit binary numbers, e.g. 1011 + 1110 = 1 1 0 0 1, the 5-bit result is 1 1 0 0 1 in which the leftmost bit is carry-out bit and sum result is 1 0 0 1, so that final sum is 1 1 0 0 1 which is 25 in decimal.    (b)      Design and Implement the four-bit adder circuit preferably using CEDAR logic simulator...

  • The circuit below takes as input a four bit unsigned binary number A A2 A Ao and generates a single output F. Design th...

    The circuit below takes as input a four bit unsigned binary number A A2 A Ao and generates a single output F. Design the circuit where F will only be true if the decimal value of the input mod 3 is equal to 1 (F is true if the input mod 3- 1; F will be false otherwise). To implement F, you may use only the 8 x 1 multiplexor given below. You may not use any additional gates (such...

  • In quartus prime Implement a 4-bit adder/subtractor using structural VHDL. The circuit will have two 4-bit...

    In quartus prime Implement a 4-bit adder/subtractor using structural VHDL. The circuit will have two 4-bit data inputs (A and B), a control line (add /sub), a 4-bit sum output (S), a carry-out bit (Cout), and an overflow flag. You need two VHDL files (fulladd.vhd) and (hybrid.vhd) to implement the design. VHDL code, fulladd.vhd, will implement a single-bit full adder. The VHDL file, hybrid.vhd, will create four instances of the single-bit full adder. Four XOR gates will be needed to...

  • Click Submit to complete this assessment Questions 10 points Design a digital circuit that reorders the...

    Click Submit to complete this assessment Questions 10 points Design a digital circuit that reorders the bits of a 4-bit binary number as follows: If the number is even, bits by bb bby become b, bobby. For example, 0110 becomes 1001 If the number is odd, bits bybb, b, bbecome bybob. For example, 1001 becomes 0110 Solve the following on paper, and then fill in the blanks below: NOTE: In parts 3 and 4, there is no need to draw...

  • [Paperl (10 pts.) Design a circuit that takes in four 4-bit unsigned numbers, A (A3..Ao), B (B3.....

    [Paperl (10 pts.) Design a circuit that takes in four 4-bit unsigned numbers, A (A3..Ao), B (B3..Bo), C (C3-C), and D (D3..Do) and produces the 6-bit unsigned sum of those numbers. You should use three 4-bit adder blocks (74LS283's), and a minimal number of full adders or half adder build blocks. You should organize your adder circuits to perform as many additions in parallel (at the same time) as possible. Getting started: Write out the columns of addition and see...

  • Design a Combinational circuit that forms that form the 2-bit binary Sum S1S2 of two 2-bit...

    Design a Combinational circuit that forms that form the 2-bit binary Sum S1S2 of two 2-bit numbers X1X0 and Y1Y0 and can produce a carry ouput C. Design the entire circuit with the help of three half adder circuits implementing each of the three outputs with XOR-AND and OR gates

  • Design a combinational circuit that accepts a 2-bit number and generates a 4-bit binary number output...

    Design a combinational circuit that accepts a 2-bit number and generates a 4-bit binary number output equal to the square of the input number. Use Decoder and any other external gates as necessary to implement your design. Draw the logic diagram and clearly label all input and output lines.

  • 3- Design, Implement a combinational circuit that generates the equation: Y=b2+4 Assuming input b as 3-bit...

    3- Design, Implement a combinational circuit that generates the equation: Y=b2+4 Assuming input b as 3-bit binary number denoted by (b = x, y, z )and the output ( y = yo, Yi, ....yn) Assignment (2) Repeat Assignment (2) using 3X8 line decoder in the implementation Process

  • number 4 and 5 please! PROBLEM STATEMENT A logic circuit is needed to add multi-bit binary...

    number 4 and 5 please! PROBLEM STATEMENT A logic circuit is needed to add multi-bit binary numbers. A 2-level circuit that would add two four-bit numbers would have 9 inputs and five outputs. Although a 2-level SOP or POS circuit theoretically would be very fast, it has numerous drawbacks that make it impractical. The design would be very complex in terms of the number of logic gates. The number of inputs for each gate would challenge target technologies. Testing would...

ADVERTISEMENT
Free Homework Help App
Download From Google Play
Scan Your Homework
to Get Instant Free Answers
Need Online Homework Help?
Ask a Question
Get Answers For Free
Most questions answered within 3 hours.
ADVERTISEMENT
ADVERTISEMENT