Design a 10 time unit duration using a 16 bit counter. Any tips?
the question u are asking in another words is showing me question of types
firstly is counting of ten clock pluses as one unit that is counter will count or change its state for every ten pulses....
if this is your question the answer is adding frequency divider circuit to your clock input that is which divides your clock pulses by ten times. so when 10 clock pulses come in the frequency divider circuit changes only by one time
this can be implemented by ic555 timer or other dedicated ics like 7490

second one is decade counter using 16 bit counter....
we can construct a counter of such type using 16 bit counter and is even not efficient. but we can easily realise the decade counter using 4 bit synchronous counters ... so try using 4 bit counter as shown below

hope your doubt is answered !!
Design a 16 bit counter that always adds 4
Design a 4 bit up-down Binary counter counter Based on the value of the direction input the counter shall count up from 0000 to 1111 and repeat or it shall count down from 1111 to 0000 and repeat. At any given time if reset input is asserted (reset = 1) the counter has to reset to its initial state, 0000. Implement this counter using JK flip-flops
1. Design a synchronous 2-bit up-down counter using a T flip flop for the most significant bit and an SR flip flop for the least significant bit; when the input X-1, it should count down and for X-0, it should count up. Use SOP.
1. Design a synchronous 2-bit up-down counter using a T flip flop for the most significant bit and an SR flip flop for the least significant bit; when the input X-1, it should count down and...
VERILOG CODE Design a new Verilog module to define a 4-bit counter algorithmically using behavioral modeling. This time we no longer need T FlipFlop submodule. The 4-bit counter can be directly implemented using a 4-bit register variable and adding 1 to its value as follows: input Clock, Clear, Enable; output reg [3:0] Q; always @ (posedge Clock or negedge Clear) if (~Clear) Q <= 0; else if (Enable) Q <= Q + 1'b1;
Design a 4-bit Johnson counter with 6 unique stages without using external gates.
Up-Down counter with enable using JK flip-flops: Design, construct and test a 2-bit counter that counts up or down. An enable input E determines whether the counter is on or off. If E = 0, the counter is disabled and remains in the present count even though clock pulses are applied to the flip-flops. If E= 1, the counter in enabled and a second input, x, determines the count direction. If x= 1, the circuit counts up with the sequence...
Design a modulo-11 up/down counter using a regular modulo-16
counter and any combinational logic. The modulo-11 up/down counter
has four modes; count up by 1, count up by 2, count down by 1, and
no count. A formal description of the modulo-11 up/down counter is
shown below.
Inputs: ctrL0, ctrl-1 є {0, 1} State/Output:s (0,1, 10) The state transition function is defined as: s(t) if ctrl-0-0 and ctrl-1 = 0 (s(t)+ 1) mod 11 ifctl_0-0 and ctrl 1-1 s(t+1(s(t)+2) mod1...
Please design a 4 bit synchrous counter (0-9 count) using t flip flops. Counter should reset to 0 after 9. Kindly provide all steps including state table. I will be thankful to you.
Design 2-bit comparator using 1-bit comparators. Draw the circuit using a block diagram for the unit comparator and any additional gates. Include logic such as: A=B when (A0=B0 && A1=B1) A>B when (A1>B1 or A1=B1 && A0>B0), etc.
Design (and then verify your design by simulating it) a two-bit
counter that counts up or down. Use an enable input E to determine
whether the counter is on or off: if E = 0 the counter is disabled
and remains at its present count even if clock pulses are applied.
If E = 1, the counter is enabled and a second input, x, determines
the direction of the count: if x = 1 the circuit counts upward 00,
01,...