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Exercises Some of the questions below are taken from or based on questions in Tanenbaum, Structured Computer Organisation, 5th edition How many memory reads are required to read a word of the given width in cach of the following circumstances. (If more than one answer is possible depending on the alignment, then give the best-case and the worst-case.) (a) 4 byte word, 8-bit data bus, natural alignment required (b) 4 byte word, 16-bit data bus, natural alignment required (c) 8 byte word, 32-bit data bus, natural alignment required (d) 2 byte word, 8-bit data bus, no alignment restrictions (e) 8 byte word, 16-bit data bus, no alignment restrictions (f) 8 byte word, 32-bit data bus, no alignment restrictions Why is it advantageous for a processor to require natural alignment? 1. Answers Some of the questions below are taken from or based on questions in Tanenbaum, Struct Computer Organisation, 5th edition. 1. ured word of the given width in each of the How many memory reads are required to read a following circumstances. (If more than one answer is possible depending on the alignment, then give the best-case and the worst-case.) (a) 4 byte word, 8-bit data bus, natural alignment required 4 memory reads will be required one per byte (b) 4 byte word 6-bit data bus, natural alignment required 2 memory reads will be required - 2 bytes per read (c) 8 byte word, 32-bit data bus, natural alignment required 2 memory reads will be required- 4 bytes per read (d) 2 byte word, 8-bit data bus, no alignment restrictions for each. It doesn't matter what the alignment 2 memory reads will be required - one byte restrictions are when only one byte is read at a time. (e) 8 byte word, 16-bit data bus, no alignment restrictions natural alignment case which is a multiple of 8 bytes). In this case 4 memory reads will be Best case- the word begins at an address which is a multiple of 2 bytes (this includes the d. require The other option is if the word begins at an odd address -in this case five memory reads will be required with the first and last reads each returning one byte of the word (plus an unwanted byte) and the second through fourth reads each returning two bytes of the word. (f) 8 byte word, 32-bit data bus, no alignment restrictions Best case the word begins at an address which is a multiple of 4 bytes (this includes the natural alignment case which is a multiple of 8 bytes). In this case 2 memory reads will be required The other option is if the word begins at an address which is not a multiple of 4 -in this case 3 memory reads will be required. Why is it advantageous for a processor to require natural alignment? Because this guarantees that you'll be able to read longer words in from memory with the fewest possible number of reads.

Answer 1

1.

In case of natural alignment, minimum read cycles is being fetched by the CPU.

(a) 4 byte word, 8-bit data bus, natural alignment required

We have 8-bit data bus that means 8 bits can be read at once i.e. 1 byte.

So, in order to read 4 byte we need 4 memory read.

(b) 4 byte word, 16-bit data bus, natural alignment required

Here, we have 16 bit data bus that means 16 bits can be read at once i.e. 2 bytes.

So, in order to read 4 byte word, 2 memory read are required.

(c) 8 byte word, 32 bit data bus, natural alignment required

Here, we have 32 bit data bus that means 32 bits can be read at once i.e. 4 bytes.

So, in order to read 8 byte word, 2 memory read are required.

(d) 2 byte word, 8 bit data bus, no alignment restrictions

Here, we have 8 bit data bus that means 8 bits can be read at once i.e. 2 bytes.

So, in order to read 2 byte word, 2 memory read are required.

When only 1 byte(8bits) is read at once, alignment restrictions does not matter.