Question

(a) Design an asynchronous Binary Coded Decimal (BCD) count-up counter using JK flip-flops. Draw the counter circuit clearly showing the configuration of the JK flip-flops and the necessary logic gate(s). Sketch the input and output waveforms of this counter (7 Marks) (b) The binary up/down counter for a cargo lift controller in a 7-storey building has an up-down (UID) control input and a buzzer output (B). The buzzer will sound B 1) when the lift is at level 1 or level 7. The configuration of the input is given in Table 2. Table 2 UID State Count up Count down For the binary up/down counter, (i) Draw the Moore model state diagram (ii) Tabulate the excitation table based on D flip-flops (iii) Plot the K-maps and write the characteristic equations. (iv) Realize the circuit using D flip-flops and NAND gates. (15 Marks) (c) Discuss the one's catching problem in master-slave JK flip-flops, and explain why this problem does not occur in other edge-triggered flip-flops.

Answer 1

o/p means output.

PAGE NO. 1 DATE Clock k C 9 o t .P TABLE 2

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PAGE NO. -03 DATE 叶1 tho a BCD ue.soutea

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