Question

Need help understanding and doing this type of problem. Will upvote for clear instructions, please! (parts 1-3)

Objective: Design a Counter using T Flip-Flops that counts 0, 1, 2, 3, 4, 5, 6, ... Hints: 1) Construct the State Table, consider unused states as don't care conditions. The State Table should include the Present State, Next State, and Inputs to TF-F's. 2) Using K-maps find the simplified Input equations to the TF-F's. 2) Draw the Logic circuit diagram.

Answer 1

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Excitation table for T FF:

Excitation Table for T flipflop Q Q+ T 0 0 0 0 1 1 1 0 1 1 1 0

State table:

Present State Next State T Input TB A2 АО A2+ A1+ A0+ TA TC A1 0 0 0 0 0 0 1 0 0 0 0 0 1 0 1 1 1 0 1 1 1 0 1 0 0 0 1 0 1 1 1 0 0 1 1 1 1 0 1 0 1 0 1 0 1 1 0 0 0 0 1 0 0 X 1 1 0 0 0 0 1 1 х X 0 X 1 1 0 0 0 X

Minimaization:

A1A0 A2 0 00 01 11 10 1 1x X TA=A2A0+A1A0 A1AO A2 00 11 10 01 1 0 1 1 X X TB=A2'A0+A1A0 A1A0 A2 00 01 11 10 1 1 1L

Implementation in logisim:

CLOCK } A2 Tleno A1 a Tleno ot A0 {m Tleno

Hope this helps

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