Question

Write Verilog program, verify using test benches using monitor/display/strobe and provide output for the following programs.

28

integer count; initial begin count = 0; repeat (128) /7 from 0 to 127 begin $display ("Count = %d", count); count -count+1; end end 29 word address = 0; repeat (memory_size) / repeat for a number of times begin memory [word_address] 0i word address -word address + 1; end 30 reg clock initial begin clock = 1'b0; forever #10 clock -clock; end 31. reg clock; initial begin: clock loop clock = 0; forever begin #10 clock = 1; #10 clock 0; end end initial #350 clock-loop; disable

Answer 1

module testbench_28;
integer count;
initial begin
count = 0;
repeat(128)
begin
$display("count = %d", count);
count = count + 1;
end
end
endmodule

// Part a) This program prints the output from 0 to 127
/************ Output of Program ************
count = 0
count = 1
count = 2
count = 3
count = 4
:::: :: :::
count = 125
count = 126
count = 127
*******************************************/

module testbench_29;
reg [4:0] memory_size = 5'd16;
reg [3:0] word_address;
reg [3:0] memory[15:0];

initial begin
word_address = 0;
repeat(memory_size)
begin
memory[word_address] = 0;
$display("memory[%d] = %d", word_address, memory[word_address]);
word_address = word_address + 1;
end
end
endmodule

// Part b) This part of code will initialize memory with '0' for all memory address locations
/************ Output of Program ************
memory[ 0] = 0
memory[ 1] = 0
memory[ 2] = 0
memory[ 3] = 0
memory[ 4] = 0
memory[ 5] = 0
memory[ 6] = 0
memory[ 7] = 0
memory[ 8] = 0
memory[ 9] = 0
memory[10] = 0
memory[11] = 0
memory[12] = 0
memory[13] = 0
memory[14] = 0
memory[15] = 0
*******************************************/

module testbench_30;
reg clock;

initial begin
clock = 1'b0;
forever #10 clock = !clock;
end

initial begin
$monitor("@time = %4d : clock = %b", $time, clock);
end

endmodule

// Part C)
// This peice of code will create a clock with time period = 2*20 = 40 time units
// This clock will have same ON time as well as same OFF time i.e Duty cycle of the clock is 50 %
// And the clock start from '0' onwards, and keeps on continuing like a infinite loop

/************ Output of Program ************
@time = 0 : clock = 0
@time = 10 : clock = 1
@time = 20 : clock = 0
@time = 30 : clock = 1
@time = 40 : clock = 0
@time = 50 : clock = 1
@time = 60 : clock = 0
::::: :: :::: ::::::: :::
::::: :: :::: ::::::: :::
::::: :: :::: ::::::: :::
::::: :: :::: ::::::: :::
@time = 573680 : clock = 0
@time = 573690 : clock = 1
@time = 573700 : clock = 0
@time = 573710 : clock = 1
@time = 573720 : clock = 0
@time = 573730 : clock = 1
@time = 573740 : clock = 0
@time = 573750 : clock = 1
@time = 573760 : clock = 0
@time = 573770 : clock = 1
@time = 573780 : clock = 0
*******************************************/

module testbench_31;
reg clock;

initial begin : clock_loop
clock = 0;
forever begin
#10 clock = 1;
#10 clock = 0;
end
end

initial #350 disable clock_loop;

initial begin
$monitor("@time = %4d : clock = %b", $time, clock);
end

endmodule

// Part D)
// This peice of code creates the clock with Toff time = 10 time units; and
// Ton time = 10 units; So, the Total time period = 10 + 10 = 20 time units
// While the duty cycle is 50 %, for this clock
// The simulation stops after #350 time unit
//
/************ Output of Program ************
@time = 0 : clock = 0
@time = 10 : clock = 1
@time = 20 : clock = 0
@time = 30 : clock = 1
@time = 40 : clock = 0
@time = 50 : clock = 1
@time = 60 : clock = 0
@time = 70 : clock = 1
@time = 80 : clock = 0
@time = 90 : clock = 1
@time = 100 : clock = 0
@time = 110 : clock = 1
@time = 120 : clock = 0
@time = 130 : clock = 1
@time = 140 : clock = 0
@time = 150 : clock = 1
@time = 160 : clock = 0
@time = 170 : clock = 1
@time = 180 : clock = 0
@time = 190 : clock = 1
@time = 200 : clock = 0
@time = 210 : clock = 1
@time = 220 : clock = 0
@time = 230 : clock = 1
@time = 240 : clock = 0
@time = 250 : clock = 1
@time = 260 : clock = 0
@time = 270 : clock = 1
@time = 280 : clock = 0
@time = 290 : clock = 1
@time = 300 : clock = 0
@time = 310 : clock = 1
@time = 320 : clock = 0
@time = 330 : clock = 1
@time = 340 : clock = 0
*******************************************/