a) Write a verilog module for 1:4 Demultiplexer using verilog primitives. b) Design 1-to-4 DEMUX using...

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Question

a) Write a verilog module for 1:4 Demultiplexer using verilog primitives. b) Design 1-to-4 DEMUX using...

a) Write a verilog module for 1:4 Demultiplexer using verilog primitives.

b) Design 1-to-4 DEMUX using tristate buffers in verilog.

c) Write a code in NIOS-II assembly to execute following statement:

b=(a+b)-(c+d)

engineering Computer-Science

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Answer 1

Answer #1

a)

module demux1_4 ( dinput ,i1,i2,w,x,y,z );

output w;
output x ;
output y;
output z ;

input dinput ;
input i1 ;
input i2;

assign w = dinput & (~i1) & (~i2);
assign x = dinput & (~i1) & i2;
assign y = dinput & i1 & (~i2);
assign z = dinput & i1 & i2;

endmodule

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Answer 2

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Add Answer to: a) Write a verilog module for 1:4 Demultiplexer using verilog primitives. b) Design 1-to-4 DEMUX using...

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