

1. Cache memory (8pts) Consider adding cache to a processor-memory system desigrn. The microprocessor without cache needs 12 clock cycles to read a 16-bit word from the memory. With cache, it takes o...
1. Cache memory (8pts) Consider adding cache to a processor-memory system design. The microprocessor without cache needs 12 clock cycles to read a 16-bit word from the memory. With cache, it takes only 4 clock cycles if the data happens to be in the cache and a total 20 clock cycles including the cache misses. a. What is the performance ratio of the cache system to the non-cache system given a hit rate of 80%? b. For what hit rate...
Question 4 - [25 Points] Part (a) - Average Access Time (AMAT) The average memory access time for a microprocessor with One (1) level (L1) of cache is 2.4 clock cycles - If data is present and valid in the cache, it can be found in 1 clock cycle If data is not found in the cache, 80 clock cycles are needed to get it from off- chip memory Designers are trying to improve the average memory access time to...
4B, 20%) compare performance of a Processor with cache vs. without cache. Assume an Ideal processor with 1 cycle memory access, CPI1 Assume main memory access time of 8 cycles Assume 40% instructions require memory data access Assume cache access time of I cycle Assume hit rate 0.90 for instructiens, 0.80 for data Assume miss penalty (time to read memory inte cache and from cache to Processor with cache processor) is 10 cycles >Compare execution times of 100-thousand instructions:
4B,...
Q4. CISC/RISC and Cache Memory (24pts) Q4-1. Assume that UltraSpark-like processor has an L1 cache with the following specifications: 40-bit wide address and 64-bit wide data busses On-chip instruction cache Cache is 16K bytes, organized as a 2-way set associative Cache line (block) size = 64 bytes 200 MHz clock frequency Average cache hit rate = 90% Instructions located in cache execute in 1 clock cycle Instructions that are not found in the on-chip cache will cause the processor to...